A method of swing on a swing is disclosed, in which a user positioned on a standard swing suspended by two chains from a substantially horizontal tree branch induces side to side motion by pulling alternately on one chain and then the other.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7106093 | Semiconductor device A semiconductor device having a plurality of cascaded IC's (14, 15, 16), wherein the matching impedance between a signal transmission path (12) connected to an external signal transmission path and an input-side or output-side IC (14, 16) is set... | 09/12/2006 |
| 7085281 | Method and system for processing upstream packets of an optical network A protocol for an optical network can control the time at which subscriber optical interfaces of an optical network are permitted to transmit data to a transceiver node. The protocol can prevent collisions of upstream transmissions between the subscriber optical int... | 08/01/2006 |
| 6507929 | System and method for diagnosing and repairing errors in complementary logic A system within a complementary logic circuit having a true tree and a complement tree, for correcting an illegal non-complementary output caused by a defect in either tree. A complementary logic circuit has a true tree for producing a true signal and a c... | 01/14/2003 |
| 6502220 | Complementary logic error detection and correction A system and method for detecting and rectifying a proscribed non-complementary output from a complementary logic circuit. A complementary logic circuit having a true tree and a complement tree is provided. The true tree produces a true signal utilized to... | 12/31/2002 |
| 6253350 | Method and system for detecting errors within complementary logic circuits A method and system for detecting faults within dual-rail complementary logic circuits. A method and system are disclosed for detecting faults within dual-rail complementary logic circuits. A dual-rail complementary logic circuit is coupled to an associat... | 06/26/2001 |
| 5550804 | Data bus system A data bus system including a serial data bus operated with complementary logic signals, several system users, communicating with each other via the bus lines of the data bus, and several output stages complete with a transmitter and a receiver, where eac... | 08/27/1996 |
| 5495099 | High speed super push-pull logic (SPL) circuit using bipolar technology A PNP bipolar transistor is connected to both ends of a resistive element of a Super Push-Pull Logic (SPL) circuit so as to place an emitter thereof at the side of a power supply source. Resistive elements and an NPN bipolar transistor forms a bias circui... | 02/27/1996 |
| 5053645 | Threshold logic circuit In a threshold logic circuit, digital input signals are weighted and summed up and then the sum of weighted digital signals is compared with a threshold value. The threshold logic circuit comprises a plurality of current switching circuits and means for s... | 10/01/1991 |
| 4943740 | Ultra fast logic The logic has an extremely high speed, very low number of components and large common mode rejection, and is intended to eliminate the emitter-coupled logic (ECL). The supply voltage and power consumption are small. The logic is particularly for digital s... | 07/24/1990 |
| 4912341 | TTL buffer circuit with active turn-off A TTL buffer circuit includes an active turn-off means so as to provide faster output transitions without using excess power dissipation. The active turn-off means is formed of a Schottky diode (D402), a resistor (R417), and a Schottky bipolar transistor ... | 03/27/1990 |
| 4868904 | Complementary noise-immune logic Logic gates with large logic swings and large noise margins use complementary pull-up and pull-down enhancement-mode drivers. Connected between the input node of the logic gate and the control electrode of each of the drivers is a series combination of a ... | 09/19/1989 |
| 4841173 | Bipolar logic circuit In a bipolar logic circuit, an ouptut Darlington transistor and a first transistor are connected in series between a high potential source and a low potential source. A second transistor has a collector connected to a base of the output Darlington transis... | 06/20/1989 |
| 4829198 | Fault tolerant logical circuitry A fault tolerant logic circuit capable of absorbing many D.C. and A.C. defects. The logic circuit employs a number of redundant logic gate circuits. The gate circuits are arranged in at least first and second interconnected signal paths. The logic gate ci... | 05/09/1989 |
| 4803383 | Transistor-transistor logic circuit A transistor-transistor logic circuit, i.e., TTL circuit includes at least one input terminal (IN; IN1, IN2), an output transistor (T10, T1), and elements (1, 2, T11, T12; 3, 4, T2) operatively connected between an input terminal and... | 02/07/1989 |
| 4709166 | Complementary cascoded logic circuit Disclosed is a Complementary Cascoded Logic (C2 L) Circuit which performs the AND-INVERT (AI) (or NAND) function. The AND function is implemented with input PNP transistors and the invert function is implemented with a first NPN transistor. An ... | 11/24/1987 |
| 4704544 | Complementary current mirror logic A new logic circuit construction in which gates are formed by appropriate interconnections of complementary current-mirror cells. With a signal applied, the resulting logic circuit draws a current drain which rises with power supply voltage, as does the s... | 11/03/1987 |
| 4689502 | Gate array LSI device using PNP input transistors to increase the switching speed of TTL buffers A gate array LSI device having inner gate circuits whose performance is not affected by the load condition and having a large fan-out number. The inner gate circuit comprises one or more PNP-type transistors, each of which receives an input signal at the ... | 08/25/1987 |
| 4682059 | Comparator input stage for interface with signal current A current interface has an impedance buffering circuit which maintains a very low input impedance at an input node, while producing currents to two current outputs which increase and decrease, respectively, with increases and decreases in the input curren... | 07/21/1987 |
| 4668879 | Dotted "or" function for current controlled gates A "dotted or" logic circuit comprising Current Controlled Gate (CCG) circuits is described. In accordance with the present invention, Schottky diodes are cross-coupled between the dotted CCG circuits. Specifically, a Schottky diode is connected between th... | 05/26/1987 |
| 4634898 | TTL buffer circuit incorporating active pull-down transistor A unique double inversion buffer has a first means to invert and isolate the digital input signal, a second means to reinvert and further isolate the input signal, and an output means including an output transistor 94. The double inversion buffer is confi... | 01/06/1987 |
| 4507575 | NAND Logic gate circuit having improved response time A NAND logic gate circuit having a first input circuit receiving a first input signal, an inverter circuit for inverting the output of the first input circuit, a second input circuit for receiving a second input signal, an AND gate circuit for producing a... | 03/26/1985 |
| 4471239 | TTL Fundamental logic circuit A TTL fundamental logic circuit comprising an npn-type input transistor, an npn-type output transistor, and a pnp-type output transistor. The pnp-type output transistor has an emitter connected to the collector of the npn-type output transistor, a base co... | 09/11/1984 |
| 4449063 | Logic circuit with improved switching A fundamental logic circuit used, for example, in an electronic computer, comprising an output inverter transistor and a switching transistor which discharges a base charge stored in a storage capacitance in a base-emitter junction of the output inverter ... | 05/15/1984 |
| 4445052 | TTL Input current reduction circuit A multi-input logic circuit comprises a multi-emitter transistor having emitters which are connected to a logic input terminals of the multi-input logic circuit, a PNP type transistor having a base which is connected to a collector of said multi-emitter t... | 04/24/1984 |
| 4433258 | Complementary Schottky transistor logic circuit A logic circuit is provided which includes a plurality of basic circuits each of which has a pnp (or npn) transistor as a constant current load and at least one npn (or pnp) transistor each as a driver with a clamping Schottky diode. The base of the drive... | 02/21/1984 |
| 4398103 | Enabling circuitry for logic circuits In order to reduce the time it takes on-chip circuitry to generate an internal enabling signal from an external clock signal and an external enabling signal, the external clock signal is applied directly to the non-inverting input of an AB gate. The outpu... | 08/09/1983 |
| 4306159 | Bipolar inverter and NAND logic circuit with extremely low DC standby power An inverter is disclosed which includes a fast turn-on circuit and a turn-off circuit comprising a standby current source and a parallel circuit of a diode and capacitor connected to the input of a bipolar transistor. Standby current plus an input transie... | 12/15/1981 |
| 4253035 | High-speed, low-power, ITL compatible driver for a diode switch The present invention relates to a driver for a diode switch comprising a complementary arrangement of a first and a second type of transistor across a voltage source. The first type of transistor is coupled to receive only a-c fluctuations in the input s... | 02/24/1981 |
| 4048517 | Logic element A logic element, particularly a bipolar gate circuit for an LSI-circuit, employing a pair of Schottky-diodes, a pair of resistances and a transistor, with the diodes, connected in high resistance direction, to respective inputs, the other sides of the dio... | 09/13/1977 |
| 3999080 | Transistor coupled logic circuit A TTL logic circuit employing single emitter PNP input transistors instead of a multi-emitter input stage, in order to reduce loading on input drive devices. The circuit features a logic swing of 1.6 volts centered on a circuit threshold of 1.6 volts with... | 12/21/1976 |
| 3987310 | Schottky diode - complementary transistor logic A logic circuit uses an input Schottky diode of a first threshold and a clamp Schottky diode of a second threshold in combination with a high speed NPN switching transistor to form a simple high speed logic element. The novel use of two Schottky diodes of... | 10/19/1976 |
| 3978349 | Switching circuit The circuit includes a first switching device having an input and an output and which in response to the presence of a signal at its input produces an out-of-phase signal at its output. A capacitor is connected, at one end, to the output of the first devi... | 08/31/1976 |
| 3956641 | Complementary transistor circuit for carrying out boolean functions Integrated circuit devices for carrying out boolean logic functions of at least two input variables. The integrated circuit device for carrying out the logical function of at least two input variables is characterized as follows: the transistors employed ... | 05/11/1976 |
| 3947865 | Collector-up semiconductor circuit structure for binary logic A collector-up binary structure of the type having spaced semiconductor regions forming a plurality of active devices for interconnection as a binary circuit is disclosed. The structure includes a semiconductor body of one conductivity having a planar sur... | 03/30/1976 |