Did You Know...
...that the x-ray was discovered purely by accident? When German physicist Wilhelm Konrad von Roentgen was experimenting with cathode rays in 1895, he put an activated Crookes tube in a book and went out to lunch. When he returned, he discovered that a key that had also been placed in the book showed up as an image on the developed film!
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| Number | Title | Issue Date |
| 7952392 | Logic circuit An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 e... | 05/31/2011 |
| 7872504 | Inverter and logic device comprising the same The inverter includes a driving transistor and a loading transistor having channel regions with different thicknesses. The channel region of the driving transistor may be thinner than the channel region of the load transistor. A channel layer of the driving transist... | 01/18/2011 |
| 7859311 | Integrated nanotube and field effect switching devices Hybrid switching devices integrate nanotube switching elements with field effect devices, such as NFETs and PFETs. A switching device forms and unforms a conductive channel from the signal input to the output subject to the relative state of the control input. In em... | 12/28/2010 |
| 7564269 | Integrated nanotube and field effect switching devices Hybrid switching devices integrate nanotube switching elements with field effect devices, such as NFETs and PFETs. A switching device forms and unforms a conductive channel from the signal input to the output subject to the relative state of the control input. In em... | 07/21/2009 |
| 7394294 | Complementary pass-transistor logic circuit and semiconductor device A complementary pass-transistor logic includes input nodes provided with first complementary signals; intermediate nodes for outputting complementary intermediate signals; a logic network comprised of NMOS transistors, the network being connected between the input n... | 07/01/2008 |
| 7288970 | Integrated nanotube and field effect switching device Hybrid switching devices integrate nanotube switching elements with field effect devices, such as NFETs and PFETs. A switching device forms and unforms a conductive channel from the signal input to the output subject to the relative state of the control input. In em... | 10/30/2007 |
| 7248198 | Reference voltage driving circuit and pipelined analog to digital converter including same A reference voltage driving circuit and a pipelined analog to digital converter including the reference voltage driving circuit capable of providing a stable reference voltage even during a high speed/high resolution of analog-to-digital conversion using source foll... | 07/24/2007 |
| 7193456 | Current conveyor circuit with improved power supply noise immunity A current conveyor circuit with improved power supply noise immunity. Additional biasing circuitry causes the nominal biasing potential applied to the output circuit to be increased, thereby producing a corresponding increase in the magnitude of noise voltage needed... | 03/20/2007 |
| 7129559 | High voltage semiconductor device utilizing a deep trench structure A semiconductor device includes a substrate having a source, a drain, and a gate between the source and the drain. Both the source and the drain include a first edge, and the gate includes a first portion. A first deep trench structure is situated under the first po... | 10/31/2006 |
| 7106093 | Semiconductor device A semiconductor device having a plurality of cascaded IC's (14, 15, 16), wherein the matching impedance between a signal transmission path (12) connected to an external signal transmission path and an input-side or output-side IC (14, 16) is set... | 09/12/2006 |
| 7078235 | Sulfur trioxide conditioning system control algorithm Optimizing fly ash resistivity by controlling concentration of sulfur trioxide (SO3) in flue gas by the use of an algorithm. ... | 07/18/2006 |
| 6759873 | Reverse biasing logic circuit A reverse biasing logic circuit is disclosed for limiting standby leakage electric current losses during circuit operation. The circuit includes a logic function circuit having one or more logic transistors that receive an input and perform a logic function operatio... | 07/06/2004 |
| 6674127 | Semiconductor integrated circuit A semiconductor integrated circuit includes: a logic circuit section including transistors formed on an SOI substrate; and a partially-depletion-type transistor, which is formed on the SOI substrate as a switching transistor for controlling ON/OFF states ... | 01/06/2004 |
| 6542007 | Inverter circuit An inverter circuit is disclosed that prevents flow of a large feedthrough current. The inverter circuit includes depletion type MOS transistor combined with a resistor to impose a current limitation when a feedthrough current flows.... | 04/01/2003 |
| 6339347 | Method and apparatus for ratioed logic structure that uses zero or negative threshold voltage A method and apparatus provides an efficient ratioed digital logic structure. The digital logic structure includes ratioed pull-up transistors and pull-down transistors such that the circuit noise margin does not substantially affect gain performance of t... | 01/15/2002 |
| 6300796 | High voltage PMOS level shifter A high voltage level shifter includes one or more complementary pairs of transistors connected together in series separate the output terminal from the input terminal so as to prevent junction breakdowns, oxide breakdowns, and punch-through breakdowns.... | 10/09/2001 |
| 6288573 | Semiconductor device capable of operating fast with a low voltage and reducing power consumption during standby A transistor and a Pch circuit are connected in parallel to a power supply node of a CMOS circuit for receiving a power supply potential therefore. A transistor and an Nch circuit are connected in parallel to a ground node of the CMOS circuit for receivin... | 09/11/2001 |
| 6137318 | Logic circuit having dummy MOS transistor A constantly conductive MOS transistor is placed in a logic circuit including a plurality of switching MOS transistors. The switching MOS transistors and the constantly conductive MOS transistor are connected in series and each receive a control signal at... | 10/24/2000 |
| 5999018 | Programmable buffer circuit comprising reduced number of transistors A programmable buffer circuit includes a first stage circuit which receives an input signal IN indicative of a first or second value, and a second stage circuit, responsive to an output of the first stage circuit, for outputting one of a value designated ... | 12/07/1999 |
| 5933050 | Semiconductor circuit A semiconductor circuit includes an input, an output, and a first transistor and a second transistor coupled in series to a power source. The first transistor is coupled closer to the power source than the second transistor is, and the first transistor ha... | 08/03/1999 |
| 5801551 | Depletion mode pass gates with controlling decoder and negative power supply for a programmable logic device Depletion mode pass gates utilized in a PLD to enable a gate voltage of Vcc to be applied for turn off, as opposed to a higher voltage required for enhancement type devices. With Vcc applied for turn off, gate oxide stress is reduced and chip reliability ... | 09/01/1998 |
| 5721516 | CMOS inverter A CMOS inverter capable of reducing a through current therein including an E-type PMOS transistor, an E-type NMOS transistor and a D-type NMOS transistor. In the E-type PMOS transistor, the gate and the drain are connected to input and output terminals. I... | 02/24/1998 |
| 5699007 | High-speed solid state buffer circuit and method for producing the same A high-speed solid state buffer circuit and method for producing the same. A buffer circuit accepts logic input signals and transforms the signals to an output signal which can drive a heavy load. By using an output stage pull-up device that includes a pa... | 12/16/1997 |
| 5656956 | Logic gate circuit and digital integrated circuit A logic gate circuit includes a resistor, a current limiting circuit, a switching transistor, and a load transistor, the source of load transistor being connected to the drain of the switching transistor, the gate of the switching transistor being connect... | 08/12/1997 |
| 5565794 | Voltage range tolerant CMOS output buffer with reduced input capacitance A tri-state CMOS output buffer is provided which exhibits a relatively low input capacitance and tolerance to a range of operating voltages. The output buffer includes a PUP input, a PD input and an output. The output buffer includes a source follower cir... | 10/15/1996 |
| 5202591 | Dynamic circuit disguise for microelectronic integrated digital logic circuits Focussed ion beam (FIB) implants (38,40) are used to set the threshold voltages of metal-oxide-semiconductor field-effect transistors (MOSFETs) in a selected logic gate (34,36) in a microelectronic integrated digital logic circuit (31) such that the direc... | 04/13/1993 |
| 5087836 | Electronic circuit including a parallel combination of an E-FET and a D-FET A class AB amplifier comprises a pull-up structure of an E-FET and D-FET connected in parallel and a pull-down structure of an E-FET and D-FET connected in parallel. Use of the E-FETs allows a high peak current to be achieved without increasing the quiesc... | 02/11/1992 |
| 5059825 | Nand gate circuit A NAND gate circuit which can be used for a decoder circuit, includes a high potential voltage source (Vcc), an output terminal (VOUT), and a load element (T1) connected between the high potential electric voltage source (... | 10/22/1991 |
| 5051618 | High voltage system using enhancement and depletion field effect transistors An enhancement mode field effect transistor and a depletion mode field effect transistor are connected in a circuit to provide for a conductivity of the transistors during a first polarity in an alternating voltage and to provide for a non-conductivity of... | 09/24/1991 |
| 4829203 | Integrated programmable bit circuit with minimal power requirement A zero-power programmable bit circuit comprised of a programmable-inverter means with an isolation transistor and with an inverter-buffer. The programmable-inverter means is includes at least one enhancement-mode transistor pair with common floating gates... | 05/09/1989 |
| 4818900 | Predecode and multiplex in addressing electrically programmable memory An electrically programmable memory array having rows and columns of floating gate type memory cells employs alternate output lines and ground lines between the columns of cells, providing a virtual ground arrangement. A row is selected by one part of an ... | 04/04/1989 |
| 4806798 | Output circuit having a broad dynamic range In order to produce an output signal swinging its voltage level between a supply voltage level VCC and the ground level, there is provided a buffer circuit comprising a series combination of first and second transistors connected between a sour... | 02/21/1989 |
| 4795917 | Low power high voltage driver circuit A circuit for driving an output between two voltage states in response to a control signal is disclosed. The circuit requires a very small amount of power in its quiescent state. The circuit comprises a first switch including first and second control term... | 01/03/1989 |
| 4767950 | MOS inverter circuit having two different supply voltages A MOS inverter circuit includes a first supply voltage source, a second supply voltage source being higher than the first supply voltage source, a control MOS FET of the enhancement type, a first load MOS FET of the depletion type connected to the control... | 08/30/1988 |
| 4727267 | Clocked buffer circuit The present invention is especially directed towards an improved clocked buffer circuit that will clock, decode, repeat and invert an input signal. The clocked buffer circuit uses a clocked latch coupled to a decode circuit such that not only will the app... | 02/23/1988 |
| 4716311 | Direct coupled FET logic with super buffer output stage An integrated logic circuit comprises a direct coupled FET logic input stage and a super buffer logic output stage. The input stage comprises a depletion-mode FET having its drain connected to a first reference potential level and having its gate and sour... | 12/29/1987 |
| 4709168 | Reference voltage generating circuit for enhancement/depletion MOSFET load circuit for driving logic circuits A reference voltage generating circuit comprises a depletion type MOS transistor of which the gate and the drain are connected to a power source and an enhancement type MOS transistor of which the gate and the drain are connected to the source of the depl... | 11/24/1987 |
| 4707622 | GaAs MESFET logic buffers using enhancement and depletion FETs A logic circuit includes an inverter circuit including a first enhancement type field effect transistor having a gate connected to an input, and a first depletion type transistor having a gate and a source which are directly connected to a drain of the fi... | 11/17/1987 |
| 4700086 | Consistent precharge circuit for cascode voltage switch logic A precharge circuit for a cascode voltage switch in which at the beginning of the precharge phase the output state is memorized and the output is isolated from the precharging points. Both the positive and negative ends of the discharge paths are precharg... | 10/13/1987 |
| 4644190 | Dynamic MOS circuit A dynamic MOS-circuit comprising a bootstrap capacitor decoupled by an output transistor and wherein the bootstrap capacitor is discharged via a MOS-FET. The MOS-FET is connected as a constant current source. With the invention, a control voltage at an ou... | 02/17/1987 |
