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| Number | Title | Issue Date |
| 7417449 | Wafer stage storage structure speed testing A system for testing integrated circuit storage structures on a semiconductor wafer. A test IC manufactured on a semiconductor wafer includes a test storage structure such as a random access memory structure, for example, and an access controller including one or mo... | 08/26/2008 |
| 7404117 | Component testing and recovery Disclosed are systems and methods of producing electronic devices. These electronic devices include excess circuits to be used as replacements for circuits that are found to be defective within the electronic device. The excess circuits are included in a different d... | 07/22/2008 |
| 7363195 | Methods of configuring a sensor network A sensor network collects time-series data from a process tool and supplies the data to an analysis system where pattern analysis techniques are used to identify structures and to monitor subsequent data based on analysis instructions or a composite model. Time-seri... | 04/22/2008 |
| 7307528 | RFID tag design with circuitry for wafer level testing Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer... | 12/11/2007 |
| 7265568 | Semi-conductor component test process and a system for testing semi-conductor components A semi-conductor component test process, and a system for testing semi-conductor components, with which several different semi-conductor-component tests can be conducted in succession. A computer installation, in particular a test apparatus is provided, with which t... | 09/04/2007 |
| 7230442 | Semi-conductor component testing process and system for testing semi-conductor components The invention involves a semi-conductor component testing process, and a system for testing semi-conductor components, in which a central computer device, in particular a central test apparatus is provided, with which test result data obtained from at least two sepa... | 06/12/2007 |
| 7151366 | Integrated process condition sensing wafer and data analysis system A process condition measuring device and a handling system may be highly integrated with a production environment where the dimensions of the process condition measuring device are close to those of a production substrate and the handling system is similar to a subs... | 12/19/2006 |
| 7149643 | Integrated process condition sensing wafer and data analysis system A process condition measuring device and a handling system may be highly integrated with a production environment where the dimensions of the process condition measuring device are close to those of a production substrate and the handling system is similar to a subs... | 12/12/2006 |
| 7089138 | Canary device for failure analysis A diagnostic system and method for testing an integrated circuit during fabrication thereof. The diagnostic system has at least one integrated circuit chip that has an electrical signature associated with it; a sacrificial circuit that is adjacent to the integrated ... | 08/08/2006 |
| 7042007 | Semiconductor device and method for evaluating characteristics of the same A single evaluation portion is formed by disposing a plurality of MIS transistors used for evaluation having substantially the same structure as that of an actually used MIS transistor. In the evaluation portion, the respective source regions, drain regions, and gat... | 05/09/2006 |
| 7022976 | Dynamically adjustable probe tips Various probe systems and probes are provided. In one aspect, a probe is provided that includes a base and a first member coupled to the base. The first member has a first tip for probing a circuit device. A first actuator is coupled to the first member for moving t... | 04/04/2006 |
| 7009383 | Wafer probe station having environment control enclosure A wafer probe station is equipped with an integrated environment control enclosure substantially surrounding a supporting surface for holding a test device, such enclosure limiting fluid communication between the interior and exterior of the enclosure and preferably... | 03/07/2006 |
| 6998860 | Method for burn-in testing semiconductor dice A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in ov... | 02/14/2006 |
| 6975312 | Computer system having network connector and method of checking connection state of network cable therefor A computer system having a network connector to which a network cable is connected, including a displaying part displaying a connection state of the network cable; a signal processing part processing a signal inputted through the network connector; and a control par... | 12/13/2005 |
| 6891389 | System and method for detecting quiescent current in an integrated circuit A method for detecting quiescent current in an integrated circuit is provided that includes detecting a magnetic field generated by the quiescent current and in response generating a magnetic field signal that is indicative of the detected magnetic field. The magnet... | 05/10/2005 |
| 6870382 | System and method for evaluating the planarity and parallelism of an array of probe tips A system includes a support member and a computer system. The support member holds and retains a probe card, which has an array of probe tips extending therefrom. The computer system includes a software program. The software causes the computer system to perform a m... | 03/22/2005 |
| 6842025 | Apparatus and method for multiple identical continuous records of characteristics on the surface of an object after selected stages of manufacture and treatment An apparatus of the invention is intended for multiple identical continuous records of characteristics on the surface of an object, e.g., a semiconductor wafer, after selected stages of manufacture and treatment. The apparatus is provided with a rotary table for rot... | 01/11/2005 |
| 6806724 | Probe for combined signals A direct current and a modulation signal are simultaneously applied to contact pads on a wafer to test certain devices, such as a laser diode. A probe, probing system, and method of probing reduces signal distortion and power dissipation by transmitting a modulated ... | 10/19/2004 |
| 6801099 | Methods for bi-directional signaling Improved methods and apparatuses are provided for conducting bi-directional signaling and testing. The outputs of at least two driver circuits are connected to a resistive network. The output signals from the driver circuits are combined through the resistive networ... | 10/05/2004 |
| 6784683 | Circuit configuration for selectively transmitting information items from a measuring device to chips on a wafer during chip fabrication The circuit configuration allows selective transmission of information items to a chip of a wafer during chip fabrication, and an apparatus having a needle card. During the test procedure of chips of a wafer which are tested in parallel, the problem can arise that, ... | 08/31/2004 |
| 6759854 | Test apparatus for testing devices under test and method for transmitting a test signal A test apparatus comprises an input for receiving a test signal from a test signal source, wherein a signal line with a predefined characteristic wave impedance can be connected to the input. The test apparatus further comprises branching means with a first and a pl... | 07/06/2004 |
| 6750666 | Automated multi-chip module handler and testing system An automated multi-chip module (MCM) handler for automated module testing which employs a module feed employing a plurality of stackable magazines, the leading one of which in an input stack is positively displaced through an indexing device which positively retriev... | 06/15/2004 |
| 6750672 | Semiconductor inspecting system for inspecting a semiconductor integrated circuit device, and semiconductor inspecting method using the same An apparatus to be inspected is mounted on one surface of a socket board. An auxiliary inspecting apparatus for adjusting timing of write signals transmitted from a semiconductor inspecting apparatus is mounted on the other surface of the socket board. Input/output ... | 06/15/2004 |
| 6724205 | Probe for combined signals A direct current and a modulation signal are simultaneously applied to contact pads on a wafer to test certain devices, such as a laser diode. A probe, probing system, and method of probing reduces signal distortion and power dissipation by transmitting a modulated ... | 04/20/2004 |
| 6662323 | Fast error diagnosis for combinational verification A fast error diagnosis system and process for combinational verification is described. The system and process localizes error sites in a combinational circuit implementation that has been shown to be inequivalent to its specification. In the typical case,... | 12/09/2003 |
| 6617871 | Methods and apparatus for bi-directional signaling Improved methods and apparatuses are provided for conducting bi-directional signaling and testing. The outputs of at least two driver circuits are connected to a resistive network. The output signals from the driver circuits are combined through the resis... | 09/09/2003 |
| 6612022 | Printed circuit board including removable auxiliary area with test points A method for manufacturing a Personal Computer Memory Common Interface Architecture ("PCMCIA") printed circuit board ("PCB") includes providing a PCB having a PCMCIA area and an auxiliary area. The PCMCIA area has multiple locations adapted to receive ele... | 09/02/2003 |
| 6597188 | Ground land for singulated ball grid array A new ground land is provided on the BGA package that allows for increasing the test sensitivity of a wire bond tester. The ground land is interconnected with a ground ring that is provided in the immediate vicinity of the BGA device. The ground land of t... | 07/22/2003 |
| 6573743 | Testing apparatus for test piece, testing method, contactor and method of manufacturing the same An apparatus of the present invention for testing a test piece comprises a contactor including a clock circuit capable of varying the frequency and a pattern signal generating circuit for generating a test pattern signal in conformity with the frequency o... | 06/03/2003 |
| 6525657 | Apparatus and method for production testing of the RF performance of wireless communications devices A radio frequency (RF) multi-testing apparatus and method for rapid (e.g. production line) testing of a wireless communications device for operational adherence of the device to a pre-determined reference specification defining specific absorption rate (S... | 02/25/2003 |
| 6521467 | Characterizing semiconductor wafers with enhanced S parameter contour mapping A system, and methods of its use, for characterizing semiconductor wafers with enhanced S parameter contour mapping employ small signal scatter parameter measurements of a representative sample of die to create a contour map of a wafer surface. Those die ... | 02/18/2003 |
| 6470480 | Tracing different states reached by a signal in a functional verification system A functional verification system which provides information as to whether a signal has reached all possible states. For example, in the case of a signal with 0 and 1 as possible states, a 2 bit variable is initialized to 00. When a value of 1 is received ... | 10/22/2002 |
| 6448525 | Capacitor characteristics measurement and packing apparatus Capacitor characteristics measurement apparatus and packing apparatus includes a turntable (1) intermittently driven at a constant pitch to supply capacitors (C) from a parts feeder (8) to a holder section (2) of the turntable (1) in a one-by-one manner. ... | 09/10/2002 |
| 6445199 | Methods and apparatus for generating spatially resolved voltage contrast maps of semiconductor test structures Disclosed is a method of inspecting a sample. The sample is illuminated with an incident beam, thereby causing voltage contrast within structures present on the sample. Voltage contrast is detected within the structures. Information from the detected volt... | 09/03/2002 |
| 6427092 | Method for continuous, non lot-based integrated circuit manufacturing A method for continuous, non lot-based manufacturing of integrated circuit (IC) devices of the type to each have a unique fuse identification (ID) includes: reading the fuse ID of each of the IC devices; advancing multiple lots of the IC devices through, ... | 07/30/2002 |
| 6424165 | Electrostatic apparatus for measurement of microfracture strength A new class of materials testing apparatus has been invented. Particularly suited to the measurement of fracture and fatigue properties in the extremely strong materials encountered in microelectromechanical systems, material strains well in excess of 1% ... | 07/23/2002 |
| 6380755 | Testing apparatus for test piece testing method contactor and method of manufacturing the same An apparatus of the present invention for testing a test piece comprises a contactor including a clock circuit capable of varying the frequency and a pattern signal generating circuit for generating a test pattern signal in conformity with the frequency o... | 04/30/2002 |
| 6211689 | Method for testing semiconductor device and semiconductor device with transistor circuit for marking A transistor circuit for marking is provided at a semiconductor chip. This circuit includes a P-type MOS transistor and an N-type MOS transistor connected in series between a power supply pad and a ground pad, the first inverter connected to a test signal... | 04/03/2001 |
| 6049203 | Apparatus and method for testing an inker of the semiconductor wafer probe station An inker test apparatus is provided for use with a wafer probe station. The test apparatus includes a plurality of movable parts which allow positioning of the inker adjacent the wafer area. Sensors are provided adjacent the inker solenoid and the inkline... | 04/11/2000 |
| 6025733 | Semiconductor memory device A semiconductor memory device includes two subcircuits each including a memory circuit, a semiconductor circuit, and a logical circuit. Connection pads are divided into only two parallel rows located along the outer periphery of the semiconductor memory d... | 02/15/2000 |
