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| Number | Title | Issue Date |
| 8111081 | Method for evaluating silicon wafer The present invention is a method for evaluating a silicon wafer by measuring, after fabricating a MOS capacitor by forming an insulator film and one or more electrodes sequentially on a silicon wafer, a dielectric breakdown characteristic of the insulator film by a... | 02/07/2012 |
| 8093916 | Method of characterizing a semiconductor device and semiconductor device A method of characterizing semiconductor device includes providing a silicon-on-insulator (SOI) substrate with at least a body-tied (BT) SOI device and a BT dummy device for measurement, respectively measuring tunneling currents (Igb) and scattering param... | 01/10/2012 |
| 7948249 | Semiconductor chip having a crack test circuit and method of testing a crack of a semiconductor chip using the same A semiconductor chip includes a line structure arranged along a peripheral region of the semiconductor chip region in order to inspect a crack, a first pad and second pad arranged on different end portions of the line structure, a second pad arranged on another end ... | 05/24/2011 |
| 7724003 | Substrate conditioning for corona charge control A measurement system for taking a reading in a test zone on a surface of a substrate. A chamber forms an environment, a surface treatment station dispenses a stabilizing chemical in the test zone, a charge deposition station deposits a charge in the test zone, and a... | 05/25/2010 |
| 7705617 | Bridge-enhanced nanoscale impedance microscopy Nanoscale impedance microscopy and related methods, circuit and/or apparatus capable of quantitatively measuring magnitude and phase of alternating current flow. ... | 04/27/2010 |
| 7683644 | Extrusion failure monitor structures A structure and method for monitoring extrusion failures. The structure includes: a test wire having first and second ends; first and second vias contacting first and second ends of the test wire; a first monitor structure electrically isolated from the test wire an... | 03/23/2010 |
| 7663383 | Method for detection and analysis of impurity content in refined metallurgical silicon A method for detection and analysis of impurity content of refined metallurgical silicon includes: (1) select the measuring points on the crystal rods or crystal ingots along the crystallization direction, measuring the resistivity at each measuring point and acquir... | 02/16/2010 |
| 7659734 | Semiconductor inspection system and apparatus utilizing a non-vibrating contact potential difference sensor and controlled illumination A method and system for identifying a defect or contamination on the surface of a semiconductor or in a semiconductor. The method and system involves providing a semiconductor with a surface, such as a semiconductor wafer, providing a non-vibrating contact potential... | 02/09/2010 |
| 7659733 | Electrical open/short contact alignment structure for active region vs. gate region An apparatus for measuring a structural characteristic between a polysilicon shape and a silicon area. The apparatus for measuring a structural characteristic between a polysilicon shape and a silicon area comprises the silicon area, and a plurality of polysilicon s... | 02/09/2010 |
| 7646207 | Method for measuring a property of interconnections and structure for the same A method for measuring a property of interconnections is provided. The method includes the following steps. A plurality of interconnection test patterns are provided. A pad to which the plurality of interconnection test patterns are parallelly connected is formed. A... | 01/12/2010 |
| 7626402 | Semiconductor device and method of measuring sheet resistance of lower layer conductive pattern thereof Contact holes (openings) (17) are created in the upper electrode (14) and the dielectric film (15) of a polysilicon-insulator-polysilicon (PIP) capacitive element to form a plurality of evaluation patterns wherein the lower electrode (13)... | 12/01/2009 |
| 7595649 | Method to accurately estimate the source and drain resistance of a MOSFET Measurements of parameters of MOS transistors, also known as MOSFETs, such as threshold potentials, require accurate estimates of source and drain series resistance. In cases where connections to the MOSFET include significant external series resistance, as occurs i... | 09/29/2009 |
| 7514941 | Method and apparatus for predicting the reliability of electronic systems An apparatus for predicting the reliability of an electronic system is provided. The apparatus includes at least one component, a stress sensor operable to measure stress of the at least one component, a resistance sensor operable to measure an electrical resistance... | 04/07/2009 |
| 7453272 | Electrical open/short contact alignment structure for active region vs. gate region A method is disclosed for measuring alignment of polysilicon shapes relative to a silicon area wherein the presence of an electrical coupling is used to determine the presence of bias or misalignment. Bridging vertices on the polysilicon shapes are formed. Bridging ... | 11/18/2008 |
| 7429867 | Circuit for and method of detecting a defect in a component formed in a substrate of an integrated circuit Various embodiments of the present invention describe circuits for and methods of detecting a defect in a component formed in a substrate of an integrated circuit. According to one embodiment, a circuit comprises a plurality of components formed in a substrate and c... | 09/30/2008 |
| 7424393 | Wafer inspection device A semiconductor substrate or wafer inspection device for detecting defects on wafer surfaces includes an air-cushion stage which can be displaced in two directions (X,Y) that are perpendicular to one another. Several air nozzles are provided for this purpose. At lea... | 09/09/2008 |
| 7417442 | Method and apparatus for testing tunnel magnetoresistive effect element, manufacturing method of tunnel magnetoresistive effect element and tunnel magnetoresistive effect element A method for testing a TMR element includes a step of measuring a plurality of resistances of the TMR element by feeding a plurality of sense currents with different current values each other through the TMR element, a step of calculating a ratio of change in resist... | 08/26/2008 |
| 7408367 | Micro Kelvin probes and micro Kelvin probe methodology with concentric pad structures A micro Kelvin probe assembly and method of accomplishing a micro Kelvin measurement that determines the resistance or impedance of a device under test (DUT) that has two spaced contacts. An ammeter is used to flow current through the DUT, and a voltmeter is used to... | 08/05/2008 |
| 7397255 | Micro Kelvin probes and micro Kelvin probe methodology A micro Kelvin probe assembly and method of accomplishing a micro Kelvin measurement that determines the resistance or impedance of a device under test (DUT) that has two spaced contacts. An ammeter is used to flow current through the DUT, and a voltmeter is used to... | 07/08/2008 |
| 7394280 | Method of electro migration testing A method of determining the time to failure of parallel electro migration test structures is described. The method generally includes the steps of: measuring the resistance of the complete structure; calculating the resistance of the n individual parallel structures... | 07/01/2008 |
| 7391226 | Contact resistance test structure and methods of using same The present invention is directed to a contact resistance test structure and methods of using same. In one illustrative embodiment, the method includes forming a test structure comprised of two gate electrode structures, forming a plurality of conductive contacts to... | 06/24/2008 |
| 7372282 | Method and apparatus for testing tunnel magnetoresistive effect element, manufacturing method of tunnel magnetoresistive effect element and tunnel magnetoresistive effect element A method for testing a TMR element includes a step of measuring a plurality of resistances of the TMR element by applying a plurality of voltages with different voltage values each other to the TMR element, respectively, a step of calculating a ratio of change in re... | 05/13/2008 |
| 7365559 | Current sensing for power MOSFETs A power MOSFET, comprising main and current mirror MOSFETs, has a current sense resistance coupled between its mirror and source terminals and a monitoring circuit responsive to a first voltage dependent upon current through the current sense resistance. The circuit... | 04/29/2008 |
| 7339368 | Methods and apparatus for testing circuit boards A method includes placing a circuit board on a test sheet so that conductive pins on an underside of the circuit board are in electrically conductive contact with electrically conductive contact pads on an upper surface of the test sheet. The test sheet includes con... | 03/04/2008 |
| 7340360 | Method for determining projected lifetime of semiconductor devices with analytical extension of stress voltage window by scaling of oxide thickness A method for efficiently and accurately measuring a maximum Vcc calculation or failure rate and lifetime projection for microprocessors and other semiconductor products analytically scales low voltages applied to thinner oxides to thicker oxides. The expa... | 03/04/2008 |
| 7336086 | Measurement of bias of a silicon area using bridging vertices on polysilicon shapes to create an electrical open/short contact structure An apparatus and method are disclosed for measuring bias of polysilicon shapes relative to a silicon area wherein the presence of an electrical coupling is used to determine the presence of bias. Bridging vertices on the polysilicon shapes are formed. Bridging verti... | 02/26/2008 |
| 7334073 | Method of and apparatus for interfacing buses operating at different speeds The present invention relates to a bridge for interfacing buses within an embedded system. There is provided a method of interfacing a first bus and a second bus operating at different speeds, the method includes counting a match value assigned to a predetermined pe... | 02/19/2008 |
| 7332917 | Method for calculating frequency-dependent impedance in an integrated circuit A method for calculating frequency-dependent impedance in an integrated circuit (IC) having transistors coupled together by a line follows. First, partition the line into a plurality of rectangles of constant material. Then, solve for the minimum dissipated power in... | 02/19/2008 |
| 7327150 | Integrated circuit package resistance measurement For one embodiment, an integrated circuit includes a node to couple one or more components to the integrated circuit to carry current through a package for the integrated circuit. The integrated circuit also includes a monitor to measure a resistance of the package ... | 02/05/2008 |
| 7315174 | Method of measuring flat-band status capacitance of a gate oxide in a MOS transistor device A method of measuring flat-band status capacitance of a gate oxide in a MOS transistor device is disclosed. According to the method of measuring flat-band status capacitance of gate oxide in MOS transistor device, flat-band status capacitance of gate oxide in MOS tr... | 01/01/2008 |
| 7309991 | Scanning probe inspection apparatus A pair of pads is formed on an insulating layer formed on a top surface of a substrate, and a plurality of through-holes is laid out at equal intervals between the pads. Adjoining through holes are connected alternately by upper-layer wire interconnect lines exposed... | 12/18/2007 |
| 7304485 | Analysis of the quality of contacts and vias in multi-metal fabrication processes of semiconductor devices, method and test chip architecture A test chip performs measurements to evaluate the performances of interconnects. In particular, the statistical failure distribution, the electromigration and the leakage current are measured. An algorithm detects a via failure at any of the available n metal layers... | 12/04/2007 |
| 7301239 | Wiring structure to minimize stress induced void formation A wiring structure with improved resistance to void formation and a method of making the same are described. The wiring structure has a first conducting layer that includes a large area portion which is connected to an end of a protrusion with a plurality of “n”... | 11/27/2007 |
| 7292043 | Electronically resettable current protection for die testing Electronically reset table test apparatus. The test apparatus includes an electronically operable current breaker connected to a test jig for testing semiconductor die. The electronically operable current breaker is connected through an interface that converts signa... | 11/06/2007 |
| 7285860 | Method and structure for defect monitoring of semiconductor devices using power bus wiring grids A method for implementing defect inspection of an integrated circuit includes configuring a power bus grid structure on a first metal interconnect level, the power bus grid structure including a first plurality of wire pairs. The first plurality of wire pairs is arr... | 10/23/2007 |
| 7271606 | Spring-based probe pin that allows kelvin testing The voltage at a node of an integrated circuit can be measured or controlled using a two-wire kelvin contact with spring-based probe pins by offsetting and tapering the lower end section of the spring-based probe pin. As a result, multiple spring-based probe pins ca... | 09/18/2007 |
| 7267723 | Treating solution supply nozzle, a substrate treating apparatus having this nozzle, and a method of manufacturing a treating solution supply nozzle A resin block has a treating solution channel extending between and opening at front and back surfaces thereof. Heat conductive members are face-bonded to the front and back surfaces of the resin block, respectively, for closing the channel. Consequently, no air is ... | 09/11/2007 |
| 7262608 | Via etch monitoring A method for monitoring the depth of at least one via (11) in a wafer including the steps of arranging the via (11) as a capacitive plate (21), providing a corresponding capacitive plate (23), applying an electrical potential difference t... | 08/28/2007 |
| 7259573 | Surface capacitance sensor system using buried stimulus electrode A surface capacitance sensor system is implemented as an array of sensor electrodes near the surface of the integrated circuit and an array of stimulus electrodes below the sensor electrodes. Rows of stimulus electrodes are driven by sources while the voltages at th... | 08/21/2007 |
| 7253901 | Laser-based cleaning device for film analysis tool A system for analyzing a thin film uses an energy beam, such as a laser beam, to remove a portion of a contaminant layer formed on the thin film surface. This cleaning operation removes only enough of the contaminant layer to allow analysis of the underlying thin fi... | 08/07/2007 |
