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| Number | Title | Issue Date |
| 7969163 | Measuring signal propagation and adjustable delays in electronic devices Systems and methods to measure signal propagation delay through objects. The system includes a controller, a single shot pulse generator, a first pulse/edge former, a multiplexer/demultiplexer, a second pulse/edge former, a timer, and a counter. The controller initi... | 06/28/2011 |
| 7834642 | Testing apparatus and method which adjusts a phase difference between rising and falling signals output from a DUT A test apparatus for testing a device under test includes a first timing comparator obtaining a device output signal output from the device under test at a timing designated by a first strobe signal, a second timing comparator obtaining the device output signal at a... | 11/16/2010 |
| 7548071 | Reflectometry test system using a sliding pseudo-noise reference A technique for reflectometry testing of a signal path is disclosed. The technique includes injecting a test signal based on a probe pseudo-noise sequence into the signal path and obtaining a response signal. A sliding reference pseudo-noise sequence is correlated a... | 06/16/2009 |
| 7459915 | Electric circuit and test apparatus for outputting a recovered clock input signal There is provided an electric circuit that outputs a timing signal and a recovered clock. The electric circuit includes a delay circuit that delays a reference signal, a PLL section that delays an oscillation signal synchronized with the delayed reference signal by ... | 12/02/2008 |
| 7394238 | High frequency delay circuit and test apparatus A high frequency delay circuit operable to output a high frequency signal delayed for a desired delay time. The high frequency delay circuit includes: a variable delay circuit operable to receive a reference signal of which a frequency is lower than the high frequen... | 07/01/2008 |
| 7385403 | KVM switch configured to estimate a length of a conductor A system for estimating a length of a conductor (110) having a first end (111) and a second end (112) includes a device (120) capable of placing an electric signal on the conductor, an impedance element (130) that maintains the ele... | 06/10/2008 |
| 7378854 | Dual sine-wave time stamp method and apparatus A time of an event can be determined by acquiring an amplitude, at the time of the event, of at least two periodic timing signals that are out of phase with each other. The time of the event within a cycle of at least one of the timing signals can be determined as a... | 05/27/2008 |
| 7362121 | Self-heating mechanism for duplicating microbump failure conditions in FPGAs and for logging failures A system replicates the rapid temperature increases that are believed to cause microbump failures in certain applications of programmable logic devices (PLDs). The system configures a PLD under test with a circuit that switches a large amount of current and generate... | 04/22/2008 |
| 7336090 | Frequency specific closed loop feedback control of integrated circuits Systems and methods for frequency specific closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a frequency specific predetermined value of a dynamic operating indi... | 02/26/2008 |
| 7336092 | Closed loop feedback control of integrated circuits Systems and methods for closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a predetermined value of a dynamic operating indicator of the integrated circuit. An op... | 02/26/2008 |
| 7292176 | Delay line, analog-to-digital converting device and load-sensing circuit using the same A delay line, an analog-to-digital converting device and a load-sensing circuit using the same are provided. The delay line comprises a delay-control terminal, a reset terminal, and n delay cells DCELLx (0 | 11/06/2007 |
| 7289924 | Self-calibrating sensor A method for self-calibrating a sensor can be implemented in a system having a calibration circuit. The calibration circuit has differential circuitry which compares an output signal of the sensor with a predetermined reference signal associated with a reference pro... | 10/30/2007 |
| 7284216 | System and method for verifying signal propagation delays of circuit traces of a PCB layout A system for verifying signal propagation delays of circuit traces of a printed circuit board (PCB) layout includes a computer (1). The computer includes: a setting module (10) for setting a minimum propagation delay and a maximum propagation delay for... | 10/16/2007 |
| 7276946 | Measure-controlled delay circuits with reduced phase error Measure-controlled delay (MCD) circuits include a measure circuit and sample circuit for synchronizing an output clock to an input clock. In response to triggering of the measure circuit, sample circuits sample outputs of a measure delay array. Sample reset logic pr... | 10/02/2007 |
| 7275011 | Method and apparatus for monitoring integrated circuit temperature through deterministic path delays An apparatus for monitoring the temperature of an integrated circuit device includes a conductive wiring pattern formed on the integrated circuit device, extending into areas of the device to be monitored. A deterministic signal source is configured to generate a de... | 09/25/2007 |
| 7257745 | Array self repair using built-in self test techniques A soft-fust test algorithm is distributed on-chip from an ABSIT engine through an LSSD shift register chain to dynamically evaluate a plurality of arrays with redundancy compensation for bad elements and repair those that are fixable. Using single-bit MISR error eva... | 08/14/2007 |
| 7254198 | Receiver system having analog pre-filter and digital equalizer A receiver system suitable for a local area network contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605). A symbol-information-carrying input analog signal... | 08/07/2007 |
| 7239971 | Method and apparatus for calibrating communications channels A periodic signal is driven onto a transmission line, and the frequency of the periodic signal is varied from an initial frequency that corresponds to a quarter wave or half wave of an estimated length of the transmission line. A null or a peak in the envelope of th... | 07/03/2007 |
| 7202656 | Methods and structure for improved high-speed TDF testing using on-chip PLL Methods and structure for improved high-speed TDF testing using an on-chip PLL and associated logic to generate high speed launch and capture pulses. A reference clock may be applied to a PLL circuit within the integrated circuit under test to generate a higher freq... | 04/10/2007 |
| 7199989 | Digital protection relay with time sync function In a digital protection relay with a time sync function, the sampling timing of which is specified based on a reference timing transmitted from a time signal generator to a time sync unit, with a determination value. The time sync unit includes a reception circuit t... | 04/03/2007 |
| 7196526 | Matched delay line voltage converter A method and apparatus for measuring or converting voltage, the method comprising: applying an input voltage to a primary delay line; applying a reference voltage to a timer delay line; propagating a delay signal through the primary delay line; propagating a timer s... | 03/27/2007 |
| 7177205 | Distributed loop components In some embodiments, a chip includes a chip interface to accept a delay control signal from outside the chip. The chip also includes a controllable delay line to delay an input signal responsive to the delay control signal to provide an output signal with a particul... | 02/13/2007 |
| 7167123 | Object detection method and apparatus Method and apparatus for detecting objects. In one embodiment, a person entering a secured zone is illuminated with low-power polarized radio waves. Differently polarized waves which are reflected back from the person are collected. Concealed weapons are detected by... | 01/23/2007 |
| 7168056 | System and method for verifying trace distances of a PCB layout A system for verifying trace distances of a PCB layout includes a computer (10) and a database (11). The computer includes: a segment receiving module (100) for receiving segments of a selected trace, and depositing the segments in a segment set... | 01/23/2007 |
| 7154274 | High-sensitivity measuring instrument and method of using the instrument to measure a characteristic value at a point in time A high-sensitivity measuring instrument comprising at least two sensors for detecting the same characteristics by touching a substance being measured with a specified time difference, wherein the between detection signals taken out simultaneously from respective sen... | 12/26/2006 |
| 7110899 | Phase measurement in measuring device Methods and apparatus for determining the phase of a signal in a measurement device having a digital signal processor are described. The signal is digitised and the digitised signal, or a signal derived therefrom, is numerically correlated with a numerically generat... | 09/19/2006 |
| 7107166 | Device for testing LSI to be measured, jitter analyzer, and phase difference detector LSI test equipment can acquire output data of an LSI as a device under test by a clock signal output from the LSI to be measured and acquire measurement data synchronously with the output data having jitter. The LSI test equipment includes a clock side time interpol... | 09/12/2006 |
| 7103494 | Circuit arrangement and data processing method A circuit arrangement in which two parallel subcircuits having a same functionality have a same input signal applied to them, and their output signals are compared in a common comparison arrangement. The two subcircuits are designed differently in terms of sensitivi... | 09/05/2006 |
| 7096443 | Method for determining the critical path of an integrated circuit A method of determining the critical path of a circuit includes first determining the paths, their mean path transit times and their path transit time fluctuations. Paths having similar statistical parameters are combined to form one path group. For each path group,... | 08/22/2006 |
| 7076697 | Method and apparatus for monitoring component latency drifts A method and apparatus for monitoring the response times of computer system components in order to improve computer system reliability and performance are provided. The method and apparatus are particularly applicable to computer systems with memory circuits, such a... | 07/11/2006 |
| 7075309 | System and method to locate an anomaly of a conductor A system (20) and method to locate an anomaly (22) of a conductor (24) is provided. The system (20) uses a test set (28) to inject a test signal (36) into the conductor (24) at a location (PT) and a probe (... | 07/11/2006 |
| 7050517 | System and method suitable for receiving gigabit ethernet signals A detector system for high-speed Ethernet LAN is described. One embodiment includes a detector system having N one dimensional sequence detector equalizers in combination with an N-dimensional traceback decoder. The detector system detects N-dimensional symbols tran... | 05/23/2006 |
| 7043398 | Method for operating a position measuring device A system for determining a signal running time between a position measuring system and an evaluation unit. The system includes a position measuring system that has a graduation connected to a moving element, a scanning unit that scans the graduation, wherein scannin... | 05/09/2006 |
| 7009382 | System and method for test socket calibration A system and method for calibration of a test socket using a composite waveform. A group of input signal pins of test system are coupled together. A pin belonging to the group is selected as a pin under calibration. A first calibration edge is applied to the pin und... | 03/07/2006 |
| 7002925 | Method and system for computer network link with undefined termination condition The location of a termination in a properly terminated LAN can be remotely detected. The cable's skin effect produces a detectable signature at the sending-end when a step function, for example, reaches the termination. Accordingly, a network analysis device is conn... | 02/21/2006 |
| 7002357 | Method and apparatus for phase calculation from attenuation values using a Hilbert transform for FDR measurements The invention concerns a method and a device for phase calculation from attenuation values using a Hilbert transform for reflectometric measurements in the frequency domain. The invention is characterized in that the measuring system comprises a signal source for a ... | 02/21/2006 |
| 6980915 | Phase noise compensation for spectral measurements A system and method compensate for phase noise of a spectrum analyzer based on an established model of the phase noise that accommodates a variety of operating states of the spectrum analyzer. The model is used to form an array that is applied to extract an output s... | 12/27/2005 |
| 6975951 | Meter apparatus and method for phase angle compensation employing linear interpolation of digital signals A method compensates for phase differences between sampled values of first and second AC waveforms. The method employs a phase angle compensation factor and sequentially samples a plurality of values of each of the waveforms. For a positive compensation factor, seco... | 12/13/2005 |
| 6960926 | Method and apparatus for characterizing a circuit with multiple inputs A method of characterizing a circuit comprises the steps of measuring a first delay associated with the circuit when the circuit is substantially unloaded; measuring a second delay associated with the circuit when the circuit is loaded by a predetermined impedance; ... | 11/01/2005 |
| 6956422 | Generation and measurement of timing delays by digital phase error compensation A circuit and method for generating a delayed event following a trigger pulse occurring at a random time between clock pulses is disclosed. The circuit includes a clock circuit, a voltage converter, an analog-to-digital converter circuit, a memory storage circuit, a... | 10/18/2005 |
