Class 307/409 - Clocking, delay or transmission line

Subclass of Class 307 - Electrical transmission or interconnection systems
Definition: Subject matter including a transmission line between logic
No. of patents: 27
Last issue date: 04/01/2008

Number	Title	Issue Date
7352826	Analog delay circuit An analog delay circuit to impart a group delay to an analog input signal is described. The analog delay circuit may comprise a capacitor to impart at least a portion of the group delay to the analog output signal and a buffer circuit coupled between the capacitor a...	04/01/2008
7245687	Digital phase-locked loop device for synchronizing signal and method for generating stable synchronous signal A phase-locked loop (PLL) device is disclosed. The PLL device includes an interpolator receiving and processing an input signal by an interpolation operation in response to an interpolation timing value to obtain an output signal, a timing error detector in communic...	07/17/2007
7109609	Method and pulse-control circuit for a power component The invention concerns the control of thyristor-type semiconductor power components (Sw) powered by an alternating current network (VS). The control signal is a pulse (Ie). It is stored in the form of magnetic induction (B), positive or negative, in a core (T) made ...	09/19/2006
7103274	Cross-connect apparatus An apparatus having n-number of working cross-connects for cross-connecting an n-bit input signals arriving from a plurality of input paths on a per-bit basis; n-number of first logic circuits for calculating the exclusive-ORs of each said n-bit and applying outputs...	09/05/2006
7020794	Interleaved delay line for phase locked and delay locked loops An interleaved delay line for use in phase locked and delay locked loops is comprised of a first portion providing a variable amount of delay substantially independently of process, temperature and voltage (PVT) variations while a second portion, in series with the ...	03/28/2006
7015600	Pulse generator circuit and semiconductor device including same A pulse generator circuit is disclosed including a delay element coupled to a logic circuit. The delay element receives a clock signal CLK and a signal X and produces a signal XN dependent upon the clock signal CLK and the signal X. The logic circuit receives the cl...	03/21/2006
6889349	Digital event sampling circuit and method A method and circuit periodically pseudo-randomly select a sample of digital event pulses comprising a logic data signal. A first timer times a first time interval. A second timer times a second time interval within the first time interval. A delay timer, coupled be...	05/03/2005
6868504	Interleaved delay line for phase locked and delay locked loops An interleaved delay line for use in phase locked and delay locked loops is comprised of a first portion providing a variable amount of delay substantially independently of process, temperature and voltage (PVT) variations while a second portion, in series with the ...	03/15/2005
6091165	Method and apparatus to reduce peak electro-magnetic emissions from ground and power planes A method and an apparatus reduce peak electro-magnetic (EM) emissions from power and ground planes in, for example, a printed circuit board (PCB) by phase shifting synchronous signal sources to distribute EM emissions over a frequency range and by canceli...	07/18/2000
5537655	Synchronized fault tolerant reset A synchronizing circuit comprises a plurality of substantially identical modules for receiving respective asynchronous input signals and respective local clock signals with the local clock signals of the respective modules being substantially synchronized...	07/16/1996
5465347	System for reducing phase difference between clock signals of integrated circuit chips by comparing clock signal from one chip to clock signal from another chip A circuit to provide single phase clock signals having controlled clock skew to multiple integrated circuit chips is described. A source of single phase clock signals is supplied to a clock signal distribution tree of each integrated circuit. Phase compar...	11/07/1995
5440592	Method and apparatus for measuring frequency and high/low time of a digital signal A delay chain having a known number of delay elements providing various delayed outputs of its input, a first and a second register set, and preferably, an array of multiplexors, are provided to measure the frequency of a digital signal, and the high and ...	08/08/1995
5428764	System for radial clock distribution and skew regulation for synchronous clocking of components of a computing system A radial clock distribution system that converts a standard bus clock signal into two pairs of inverted and non-inverted clocking signals. The two pairs of clocking signals have a lower frequency, have a different phase, and are shifted one clock period a...	06/27/1995
5369640	Method and apparatus for clock skew reduction through remote delay regulation A remote delay regulator circuit measures the effects of intrinsic propagation delays experienced by a system clock signal propagating through an extended clock distribution path that encompasses a clock repeater chip, a module transmission network and a ...	11/29/1994
5347184	Dual receiver edge-triggered digital signal level detection system Two separate receivers (120,122) receive the input signal (128) and the clock signal (126). During the inactive state of the clock signal, the first receiver produces a low state output (130) and the second receiver produces a high state output (132). Bot...	09/13/1994
5184210	Structure for controlling impedance and cross-talk in a printed circuit substrate An arrangement for interconnecting high density signals of integrated circuits includes an electronic circuit on a multilayered substrate which includes at least three layers. These layers comprise a signal layer for carrying signals in the electronic cir...	02/02/1993
5078464	Optical logic device An optical logic device based on the time-shift-keying architecture is described in which digital logic functions are realized by applying appropriate signal pulses to a nonlinear shift or "chirp" element whose output is supplied to a dispersive element c...	01/07/1992
5070787	Method and apparatus for switching an electrical circuit The invention provides an explosively actuated switch and a method of using the same. The switch will include primary conductive elements which will remain generally stationary, and one or more movable conductive elements which will be clamped between the...	12/10/1991
5024499	Optical and gate for use in a cross-bar arithmetic/logic unit An optical AND gate for use in a cross-bar arithmetic/logic unit including first and second optical substrates which are configured adjacent to one another with each of the optical substrates having a respective plurality of optical paths formed thereon. ...	06/18/1991
4973122	Optical nonlinear cross-coupled interferometer and method utilizing same An optical device includes a 50-50 cross-coupler having a pair of ports optically coupled by a waveguide which includes a portion of material having a non-linear refractive index with a relaxation time such that the effect on the non-linear portion of a f...	11/27/1990
4964687	Optical latch and method of latching data using same An optical latch includes first and second optical switches arranged in series. An input signal is received in the first optical switch and is passed through to the second optical switch. The second optical switch latches-up to this received signal. Then ...	10/23/1990
4961621	Optical parallel-to-serial converter An optical parallel-to-serial converter constructed from at least two optical shift registers coupled in cascade by an optical two-to-one combiner. The input port of the first optical shift register serves as one input to the parallel-to-serial converter,...	10/09/1990
4923267	Optical fiber shift register An optical shift register constructed from at least two optical memory cells connected in cascade, each memory cell having an optical combiner, a 1×2 optical switch, a clock, and an optical amplifier, all connected by optical fibers. Each memory cell in ...	05/08/1990
4877974	Clock generator which generates a non-overlap clock having fixed pulse width and changeable frequency A clock generator which is cascade connected a plurality of single-phase pulse generator circuits including RS flip-flops and delay circuits for defining the pulse width of one output at the RS flip-flop through gates controlling propagation of the other ...	10/31/1989
4713621	Phase synchronization circuit A phase synchronization circuit for controlling a graphic display device in a teletext receiving system. The phase synchronization circuit includes a delay circuit, adapted to delay in sequence clock signals which are to be phase-synchronized with a refer...	12/15/1987
4463440	System clock generator in integrated circuit A system clock generator for use in a CMOS LSI chip includes a clock control signal generator for developing a control signal in response to a clock generating instruction or inhibition instruction; and a clock generator supplied with the output of an osc...	07/31/1984
4390801	Circuit for reproducing a clock signal A circuit for reproducing a clock signal from digital signals reproduced from a recording medium makes self-clocking possible. The circuit includes a phase lock loop having a voltage-controlled oscillator that generates an oscillation output at a frequenc...	06/28/1983

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Class 307/409 - Clocking, delay or transmission line