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| Number | Title | Issue Date |
| 7436046 | Semiconductor device and manufacturing method of the same Provided is a technology capable of suppressing a reduction in electron mobility in a channel region formed in a strained silicon layer. A p type strained silicon layer is formed over a p type silicon-germanium layer formed over a semiconductor substrate. The p type... | 10/14/2008 |
| 7381992 | Silicon carbide power devices with self-aligned source and well regions Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region of a first conductivity type, a buried silicon carbide region... | 06/03/2008 |
| 7365362 | Semiconductor device and method of fabricating semiconductor device using oxidation According to one aspect of the invention, there is provided a semiconductor device fabrication method comprising: forming a gate insulating film on a semiconductor substrate; forming a film containing a predetermin... | 04/29/2008 |
| 7288819 | Stable PD-SOI devices and methods One aspect of the present subject matter relates to a partially depleted silicon-on-insulator structure. The structure includes a well region formed above an oxide insulation layer. In various embodiments, the well region is a multilayer epitaxy that includes a sili... | 10/30/2007 |
| 7253045 | Selective P-channel Vadjustment in SiGe system for leakage optimization A method of manufacturing a semiconductor device includes forming a silicon germanium layer and a N-channel transistor and a P-channel transistor over the silicon germanium layer. A beta ratio of the N-channel transistor to the P-channel transistor is about 1.8 to a... | 08/07/2007 |
| 7023010 | Si/C superlattice useful for semiconductor devices A Si/C superlattice useful for semiconductor devices comprises a plurality of epitaxially grown silicon layers alternating with carbon layers respectively adsorbed on surfaces of said silicon layers. Structures and devices comprising the superlattice and methods are... | 04/04/2006 |
| 6703265 | Semiconductor device and method of manufacturing the same The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semicond... | 03/09/2004 |
| 6690064 | Thin-film semiconductor device containing poly-crystalline Si-Ge alloy and method for producing thereof A thin film transistor is provided containing polycrystalline Si--Ge alloy. A high performance TFT may be provided having crystal structure restraining both current scattering in a grain boundary and surface roughness by introduction of Ge into Si. An ima... | 02/10/2004 |
| 6690068 | Thin film transistors and semiconductor device The TFT has a channel-forming region formed of a crystalline semiconductor film obtained by heat-treating and crystallizing an amorphous semiconductor film containing silicon as a main component and germanium in an amount of not smaller than 0.1 atomic % ... | 02/10/2004 |
| 6673126 | Multiple chamber fabrication equipment for thin film transistors in a display or electronic device TFT fabrication equipment including a first chamber for processing under oxidizing atmosphere, a second chamber for processing under reducing atmosphere, a third chamber for performing crystallization, a fourth chamber for load-locking, and a fifth chambe... | 01/06/2004 |
| 6673661 | Self-aligned method for forming dual gate thin film transistor (TFT) device A method for fabricating a dual gate thin film transistor (TFT) device provides for forming a pair of source/drain layers self-aligned with respect to a first gate electrode and forming a second gate electrode self-aligned with respect to both the pair of... | 01/06/2004 |
| 6645861 | Self-aligned silicide process for silicon sidewall source and drain contacts A method (and structure formed thereby) of forming a metal silicide contact on a non-planar silicon containing region having controlled consumption of the silicon containing region, includes forming a blanket metal layer over the silicon containing region... | 11/11/2003 |
| 6638797 | High performance poly-SiGe thin film transistor and a method of fabricating such a thin film transistor The present invention pertains to a high-performance thin film transistor having a gate and an active region, whose active region comprises a poly-Si1-x Gex alloy material and a channel layer of silicon, in which the channel layer of... | 10/28/2003 |
| 6624051 | Semiconductor thin film and semiconductor device After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film has f... | 09/23/2003 |
| 6566198 | CMOS structure with non-epitaxial raised source/drain and self-aligned gate and method of manufacture A CMOS structure and method of achieving self-aligned raised source/drain for CMOS structures on SOI without relying on selective epitaxial growth of silicon. In the method, CMOS structures are provided by performing sacrificial oxidation so that oxidatio... | 05/20/2003 |
| 6521909 | Thin film semiconductor device containing polycrystalline Si-Ge alloy and method for producing thereof A high performance thin film transistor is provided containing polycrystalline Si-Ge alloy. The TFT has a crystal structure restraining both current scattering in a grain boundary and surface roughness by introduction of Ge into Si. This permits realizing... | 02/18/2003 |
| 6518645 | SOI-type semiconductor device and method of forming the same In an SOI-type semiconductor device and a method of forming the same a semiconductor device is formed in an SOI-type substrate that is composed of a lower silicon layer, a buried oxide layer, and an SOI layer. The SOI substrate includes a device region is... | 02/11/2003 |
| 6514829 | Method of fabricating abrupt source/drain junctions A method of fabricating an integrated circuit forming abrupt source/drain junctions. The process can be utilized for P-channel or N-channel metal oxide field semiconductor effect transistors (MOSFETs) on a silicon-on-insulator (SOI) substrate. The source ... | 02/04/2003 |
| 6509241 | Process for fabricating an MOS device having highly-localized halo regions A process for fabricating an MOS device having a highly-localized halo region includes the formation of a first halo region at a first surface of a silicon substrate, and a second halo region at a second surface of the silicon substrate. The second surfac... | 01/21/2003 |
| 6509586 | Semiconductor device, method for fabricating the semiconductor device and semiconductor integrated circuit A semiconductor device comprises: a channel region 14 of silicon, a source region 26 and a drain region 26 respectively forming junction with the channel region 14, and a gate electrode 30 formed on the channel region 14 interposing an insulation film 16 ... | 01/21/2003 |
| 6506636 | Method of manufacturing a semiconductor device having a crystallized amorphous silicon film Contamination of an interface of respective films constituting a TFT due to an contaminant impurity in a clean room atmosphere becomes a great factor to lower the reliability of the TFT. Besides, when an impurity is added to a crystalline semiconductor fi... | 01/14/2003 |
| 6495402 | Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions and method of manufacture A semiconductor-on-insulator (SOI) device. The SOI device includes a substrate having a buried oxide layer disposed thereon and an active layer disposed on the buried oxide layer, the active layer having an active region defined by isolation regions, the ... | 12/17/2002 |
| 6492659 | Semiconductor device having single crystal grains with hydrogen and tapered gate insulation layer To fabricate a crystalline semiconductor film with controlled locations and sizes of the crystal grains, and to utilize the crystalline semiconductor film in the channel-forming region of a TFT in order to realize a high-speed operable TFT. A translucent ... | 12/10/2002 |
| 6489222 | Method of manufacturing a semiconductor device A first insulating layer is embedded within a semiconductor film formed on a base insulating film, a second insulating layer is formed on a portion of the semiconductor film, and a laser beam is irradiated from the top side (or from both the top side and ... | 12/03/2002 |
| 6486496 | Polysilicon thin film transistor structure A method of forming a polysilicon thin film transistor. An amorphous silicon channel layer is formed over an insulating substrate. An active region is patterned out in the amorphous silicon channel layer. An oxide layer and a gate electrode are sequential... | 11/26/2002 |
| 6482684 | Method of manufacturing a TFT with Ge seeded amorphous Si layer There is provided a semiconductor device using a semiconductor thin film having high crystallinity, which is formed by a manufacturing method with high productivity. When active layers of an amorphous silicon film are crystallized, germanium is used as a ... | 11/19/2002 |
| 6479838 | Thin film transistor, thin film transistor array substrate, liquid crystal display device, and electroluminescent display device A thin film transistor having a source region and a drain region having a low melting point region composed of a semiconductor with a melting point lower than that of the semiconductor of the channel region is provided. In the thin film transistor, the do... | 11/12/2002 |
| 6445016 | Silicon-on-insulator (SOI) transistor having partial hetero source/drain junctions fabricated with high energy germanium implantation A silicon-on-insulator (SOI) transistor. The SOI transistor having a source and a drain having a body disposed therebetween, the source being implanted with germanium to form an area of silicon-germanium adjacent a source/body junction in a lower portion ... | 09/03/2002 |
| 6444509 | High performance poly-si1-xgex thin film transistor and a method of fabricating such a thin film transistor The present invention pertains to a high-performance thin film transistor having a gate and an active region, whose active region comprises a poly-Si1-x Gex alloy material and a channel layer of silicon, in which the channel layer of... | 09/03/2002 |
| 6444507 | Fabrication process for thin film transistors in a display or electronic device A fabrication process for a thin film transistor including, in the first process step, performing semiconductor layer formation processing, crystallization processing, and first gate insulator formation processing without exposing the substrate to atmosph... | 09/03/2002 |
| 6444390 | Process for producing semiconductor thin film devices using group 14 element and high temperature oxidizing treatment to achieve a crystalline silicon film Under the conditions in that a germanium film 103 is formed on an amorphous silicon film 102, a first heat treatment (crystallization step) at from 450 to 600° C. is conducted. A second heat treatment is conducted for the resulting polysilicon film 104 a... | 09/03/2002 |
| 6410373 | Method of forming polysilicon thin film transistor structure A method of forming a polysilicon thin film transistor. An amorphous silicon channel layer is formed over an insulating substrate. An active region is patterned out in the amorphous silicon channel layer. An oxide layer and a gate electrode are sequential... | 06/25/2002 |
| 6388270 | Semiconductor device and process for producing same To provide a semiconductor device utilizing a semiconductor film having a high crystallinity by a production process having a high mass productivity. Upon crystallizing an amorphous silicon film 106, germanium is used as a catalyst element for acceleratin... | 05/14/2002 |
| 6380590 | SOI chip having multiple threshold voltage MOSFETs by using multiple channel materials and method of fabricating same A semiconductor-on-insulator (SOI) chip. The SOI chip includes a substrate; a buried oxide (BOX) layer disposed on the substrate; an active layer disposed on the BOX layer, the active layer having a first area made from silicon and a second area made from... | 04/30/2002 |
| 6365465 | Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques A structure and a method of manufacturing a double-gate metal oxide semiconductor transistor includes forming a laminated structure having a single crystal silicon channel layer and insulating oxide and nitride layers on each side of the single crystal si... | 04/02/2002 |
| 6359320 | Thin-film transistor with lightly-doped drain There is provided a semiconductor device including a semiconductor circuit formed by semiconductor elements having an LDD structure which has high reproducibility, improves the stability of TFTs and provides high productivity and a method for manufacturin... | 03/19/2002 |
| 6355941 | Semiconductor device A semiconductor device which has a non-single crystal semiconductor layer formed on a substrate and in which the non-single crystal semiconductor layer is composed of a first semiconductor region formed primarily of non-single crystal semiconductor and a ... | 03/12/2002 |
| 6335266 | Hydrogen-doped polycrystalline group IV-based TFT having a larger number of monohydride-IV bonds than higher order-IV bonds A polycrystalline semiconductor material containing Si, Ge or SiGe, wherein the material contains H atoms and the number of monohydride structures of couplings between Si or Ge, and H is larger than the number of higher-order hydride structures, or in oth... | 01/01/2002 |
| 6331474 | Defect compensation method for semiconductor element A defect compensation method for a semiconductor element to compensate for defects of the semiconductor element, in which hot water is conducted with the semiconductor element to accomplish defect compensation. On the basis of this treatment, excessive pr... | 12/18/2001 |
| 6331476 | Thin film transistor and producing method thereof In producing a thin film transistor used for such devices as a large-sized liquid crystal display panel with a high pixel density, a leftover of an insulating film caused by insufficient etching and a loss of a semiconductor layer caused by overetching ar... | 12/18/2001 |
