Class 257/E29.287 - SOS transistor (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.286. This subclass
No. of patents: 67
Last issue date: 09/30/2008

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Number	Title	Issue Date
7429751	Method of manufacturing a semiconductor device There is provided a method of manufacturing a semiconductor device having a TFT with sufficient characteristics and little fluctuation by accurately controlling the addition amount of impurity ions to the semiconductor layer using an ion doping device. A semiconduct...	09/30/2008
7429772	Technique for stable processing of thin/fragile substrates A semiconductor on insulator (SOI) wafer includes a semiconductor substrate having first and second main surfaces opposite to each other. A dielectric layer is disposed on at least a portion of the first main surface of the semiconductor substrate. A device layer ha...	09/30/2008
7355248	Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same A semiconductor device includes a first semiconductor layer that is formed on a first insulating layer; a second insulating layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the second insulating layer; a first gat...	04/08/2008
7348631	Thin film transistor substrate and manufacturing method for the same A thin film transistor substrate is provided whose structure allows for the formation of (i) a thick gate insulating film, (ii) a high pressure resistance TFT having a LDD region of a GOLD structure, and (iii) a low voltage TFT having a thin gate insulating film, wi...	03/25/2008
7332776	Semiconductor device A partial isolation insulating film provided between MOS transistors in an NMOS region and a PMOS region, respectively, has a structure in which a portion protruding upward from a main surface of an SOI layer is of greater thickness than a trench depth, namely, a po...	02/19/2008
7183624	Semiconductor device A transistor region is a region where a plurality of MOS transistors, including an MOS transistor, are formed, and a dummy region is a region lying under a spiral inductor. In the dummy region, a plurality of dummy active layers are disposed in the main surface of a...	02/27/2007
6696309	Methods for making electrooptical device and driving substrate therefor An electrooptical device including a first substrate including a display section having pixel electrodes and a peripheral-driving-circuit section provided on a periphery of the display section, a second substrate, and an optical material disposed between ...	02/24/2004
6653885	On-chip integrated mixer with balun circuit and method of making the same A radio frequency (RF) mixing device wherein RF core circuit elements requiring signal splitting are provided with one or more signal splitting element(s) ("balun(s)") integrated on-chip with the core RF circuit elements. The RF mixing device comprises on...	11/25/2003
6365936	Ultra-high resolution liquid crystal display on silicon-on-sapphire A liquid crystal array and associated drive circuitry are monolithically formed on a silicon-on-sapphire structure, and are fabricated by a method comprising the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-o...	04/02/2002
6190933	Ultra-high resolution liquid crystal display on silicon-on-sapphire A liquid crystal array and associated drive circuitry are monolithically formed on a silicon-on-sapphire structure, and are fabricated by a method comprising the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-o...	02/20/2001
6090648	Method of making a self-aligned integrated resistor load on ultrathin silicon on sapphire A method of making a self-aligned, integrated resistor load on ultrathin silicon on sapphire film, with the method being used to manufacture an FET and a resistor load. While the film can be used, for example, to manufacture a four transistor SRAM, it is ...	07/18/2000
6057555	High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d...	05/02/2000
5973382	Capacitor on ultrathin semiconductor on insulator An integrated circuit is provided which comprises: an insulating substrate; a semiconductor layer formed on the insulating substrate; a MOSFET including a source, drain and channel formed in the silicon layer and a gate adjacent to the channel; a gate ter...	10/26/1999
5973363	CMOS circuitry with shortened P-channel length on ultrathin silicon on insulator An integrated circuit comprising an insulating substrate; a layer of silicon formed on said insulating substrate; a p-channel transistor and an n-channel transistor formed in said silicon layer and interconnected in a CMOS circuit; wherein the ratio of tr...	10/26/1999
5895957	Minimum charge FET fabricated on an ultrathin silicon on sapphire wafer A process is disclosed for preparing a silicon-on-sapphire wafer suited for fabrication of fully depleted field effect transistors. A fully depleted field effect transistor (FET) which has minimum parasitic charge in the conduction channel and a process t...	04/20/1999
5883396	High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d...	03/16/1999
5863823	Self-aligned edge control in silicon on insulator An improved process and structure for channel stop in silicon on insulator using LOCOS isolation are disclosed. Advantages include decreased ion dose requirements; reduced processing time; smaller ƊW characteristics, thus, small transistor size and more ...	01/26/1999
5864162	Apparatus and method of making a self-aligned integrated resistor load on ultrathin silicon on sapphire A thin silicon layer transistor integrated with a resistor. The resistor is self-aligned and contiguous with the transistor and is also formed of the same thin silicon layer as the transistor. This structure is particularly suitable for an SRAM circuit in...	01/26/1999
5861336	High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d...	01/19/1999
5663570	High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d...	09/02/1997
5600169	Minimum charge FET fabricated on an ultrathin silicon on sapphire wafer A process is disclosed for preparing a silicon-on-sapphire wafer suited for fabrication of fully depleted field effect transistors. A fully depleted field effect transistor (FET) which has minimum parasitic charge in the conduction channel and a process t...	02/04/1997
5596205	High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d...	01/21/1997
5572040	High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d...	11/05/1996
5492857	High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d...	02/20/1996
5416043	Minimum charge FET fabricated on an ultrathin silicon on sapphire wafer A process is disclosed for preparing a silicon-on-sapphire wafer suited for fabrication of fully depleted field effect transistors. A fully depleted field effect transistor (FET) which has minimum parasitic charge in the conduction channel and a process t...	05/16/1995
5410172	Thin film transistor and preparation thereof A thin film transistor is provided with a semiconductor layer disposed on an insulating layer region having a channel region and a plurality of main electrode regions having an impurity concentration higher than an impurity concentration of the channel re...	04/25/1995
5258318	Method of forming a BiCMOS SOI wafer having thin and thick SOI regions of silicon A SOI BiCMOS integrated circuit has CMOS devices formed in a thin epitaxial layer of 1,000 Å and bipolar devices formed in a thick epitaxial layer of 1 μm, the two thicknesses being formed by a process in which a set of oxide islands are formed on a fir...	11/02/1993
4969031	Semiconductor devices and method for making the same A semiconductor device has an active layer in which a semiconductor element is formed by employing a silicon single crystal as a substrate. The present invention causes a tensile strain to remain in the active layer, thereby to improve the carrier mobilit...	11/06/1990
4937640	Short channel MOSFET A field effect transistor having operating characteristics based on the control and modulation of the punch through phenomenon. The channel region between the source and the drain regions is appropriately doped such that the source and drain depletion reg...	06/26/1990
4872010	Analog-to-digital converter made with focused ion beam technology An analog-to-digital converter 10 employs a series of comparators 12, 14, 16 and 18. Each comparator includes at least one inverter consisting of a CMOS transistor pair including a P-channel transistor 22 and N-channel transistor 24. The threshold levels ...	10/03/1989
4803530	Semiconductor integrated circuit formed on an insulator substrate A semiconductor integrated circuit formed on an insulator substrate and comprising a drive transistor and a load transistor, in which a threshold voltage of the load transistor is set in the range of -2.8V to -1.0V so as to ensure stable operation without...	02/07/1989
4775641	Method of making silicon-on-sapphire semiconductor devices A radiation hardened silicon-on-insulator semiconductor device and method of making the same is disclosed. A region is formed in the silicon layer adjacent the insulating substrate which has a high density of naturally occurring crystallographic defects. ...	10/04/1988
4748485	Opposed dual-gate hybrid structure for three-dimensional integrated circuits A three-dimensional integrated circuit structure utilizing a hybridization of silicon-on-insulator and silicon-on-sapphire technologies is disclosed, wherein a buried doped epitaxial silicon layer, insulated from a gated semiconductor device by a buried i...	05/31/1988
4693758	Method of making devices in silicon, on insulator regrown by laser beam This invention relates to improvements in the SOS technology including the so-called laser annealing processing. According to this invention, a semiconductor layer of an SOS structure consists of the three layers of an interface layer made up of twins, a ...	09/15/1987
4675981	Method of making implanted device regions in a semiconductor using a master mask member A method of manufacturing an MOS transistor comprises the steps of forming a silicon nitride film on a central portion of a P-type silicon substrate, forming a first resist pattern on the semiconductor substrate and the film using a mask member having a c...	06/30/1987
4662059	Method of making stabilized silicon-on-insulator field-effect transistors having 100 oriented side and top surfaces A MOS/SOI field-effect transistor is made by applying a layer of a photoresist over the surface of a single-crystalline silicon layer which is on a substrate of an insulating material, such as sapphire. The surface of the silicon layer is along a (100) cr...	05/05/1987
4639758	Metal oxide semiconductor field-effect transistor with metal source making ohmic contact to channel-base region A source region and a drain region are formed in a semiconductor layer, a thin insulating layer of SiO2 is formed on the semiconductor layer, and a gate electrode is formed thereover. Al metal forms ohmic contacts with the source and drain regi...	01/27/1987
4631563	Metal oxide semiconductor field-effect transistor with metal source region A source region and a drain region are formed in a semiconductor layer, a thin insulating layer of SiO2 is formed on the semiconductor layer, and a gate electrode is formed thereover. Al metal forms ohmic contacts with the source and drain regi...	12/23/1986
4611220	Junction-MOS power field effect transistor A thin film insulated gate field effect transistor having an opposite conductivity type island in its channel region. The island is electrically shorted to the transistor gate electrode....	09/09/1986
4546376	Device for semiconductor integrated circuits A device for semiconductor integrated circuits having a silicon single crystal film formed on a sapphire substrate by hetero epitaxy and isolated islands having side planes. One of the side planes makes an angle of 65° or more with the surface of the sap...	10/08/1985

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Class 257/E29.287 - SOS transistor (EPO)