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| Number | Title | Issue Date |
| 7439579 | Power semiconductor with functional element guide structure A trench transistor is described. In one aspect, the trench transistor has a cell array having a plurality of cell array trenches and a plurality of mesa zones arranged between the cell array trenches, and a semiconductor functional element formed in one of the mesa... | 10/21/2008 |
| 7429769 | Recessed channel field effect transistor (FET) device A method for forming a field effect transistor device employs a self-aligned etching of a semiconductor substrate to form a recessed channel region in conjunction with a pair of raised source/drain regions. The method also provides for forming and thermally annealin... | 09/30/2008 |
| 7417266 | MOSFET having a JFET embedded as a body diode A field effect transistor, in accordance with one embodiment, includes a metal-oxide-semiconductor field effect transistor (MOSFET) having a junction field effect transistor (JFET) embedded as a body diode. ... | 08/26/2008 |
| 7397083 | Trench fet with self aligned source and contact A trench type power MOSgated device has a plurality of spaced trenches lined with oxide and filled with conductive polysilicon. The tops of the polysilicon fillers are below the top silicon surface and are capped with a deposited oxide the top of which is flush with... | 07/08/2008 |
| 7368783 | Semiconductor device A semiconductor device includes a semiconductor substrate of a first conductivity type, a lightly-doped semiconductor layer of the first conductivity type formed on the first major surface of the substrate, a first semiconductor region of the first conductivity type... | 05/06/2008 |
| 7365413 | Reduced power distribution mesh resistance using a modified swiss-cheese slotting pattern Electrical interconnects with a slotting pattern are provided in the present invention. In addition, the masks for making such interconnects and semiconductor devices incorporating such interconnects are also provided in the present invention. The slotting pattern m... | 04/29/2008 |
| 7358566 | Semiconductor device A first main electrode is provided on one surface thereof. On the other surface thereof, a second semiconductor layer of the first conduction type and a third semiconductor layer of the second conduction type are arranged alternately along the surface. A fourth semi... | 04/15/2008 |
| 7345339 | Vertical channel FET with super junction construction A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is ... | 03/18/2008 |
| 7332773 | Vertical device 4FEEPROM memory EEPROM memory devices and arrays are described that facilitate the use of vertical floating gate memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments of the present invention utilize vertical select gates and floating ga... | 02/19/2008 |
| 7298006 | Nonvolatile semiconductor memory device including improved gate electrode A floating gate is formed on a semiconductor substrate via a gate insulating film. Diffused layers are formed as sources or drain regions on opposite sides of the floating gate in the semiconductor substrate. First and second control gates are formed opposite to bot... | 11/20/2007 |
| 7294550 | Method of fabricating metal oxide semiconductor device A method of fabricating an MOS device is described. A substrate doped a first type dopant is provided as a drain. A first type epitaxial layer is formed on the substrate and is patterned with a trench to form several islands. A gate dielectric layer is than formed o... | 11/13/2007 |
| 7291884 | Trench MIS device having implanted drain-drift region and thick bottom oxide A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes a thick oxide layer at the bottom of the trench and an N-type drain-drift region that extends from the bottom of the t... | 11/06/2007 |
| 7282762 | 4FEEPROM NROM memory arrays with vertical devices NROM EEPROM memory devices and arrays are described that facilitate the use of vertical NROM memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments of the present invention utilize vertical select gates and NROM memory cel... | 10/16/2007 |
| 7256081 | Structure and method to induce strain in a semiconductor device channel with stressed film under the gate A semiconductor device is provided with a stressed channel region, where the stresses film causing the stress in the stress channel region can extend partly or wholly under the gate structure of the semiconductor device. In some embodiments, a ring of stress film su... | 08/14/2007 |
| 7226820 | Transistor fabrication using double etch/refill process A semiconductor fabrication process includes forming a gate electrode (120) overlying a gate dielectric (110) overlying a semiconductor substrate (102). First spacers (124) are formed on sidewalls of the gate electrode (120). First... | 06/05/2007 |
| 7221020 | Method to construct a self aligned recess gate for DRAM access devices Self-aligned recessed gate structures and method of formation are disclosed. Field oxide area for isolation are first formed in a semiconductor substrate. A plurality of columns are defined in an insulating layer formed over the semiconductor substrate subsequent to... | 05/22/2007 |
| 7208801 | Nonvolatile semiconductor memory device and method of manufacturing the same A nonvolatile semiconductor memory device whose gate structure of a transistor other than a memory cell transistor has a same stacked gate structure as the memory cell transistor, the gate structure comprising a semiconductor substrate, a first insulation film provi... | 04/24/2007 |
| 7205608 | Electronic device including discontinuous storage elements An electronic device can include a substrate having a trench that includes a wall and a bottom. The electronic device can also include a first set of discontinuous storage elements that overlie a primary surface of the substrate and a second set of discontinuous sto... | 04/17/2007 |
| 7205606 | DRAM access transistor Self-aligned recessed gate structures and method of formation are disclosed. Field oxide areas for isolation are first formed in a semiconductor substrate. A plurality of columns are defined in an insulating layer formed over the semiconductor substrate subsequent t... | 04/17/2007 |
| 7205605 | Semiconductor component and method of manufacturing A semiconductor component includes a semiconductor layer (110) having a trench (326). The trench has first and second sides. A portion (713) of the semiconductor layer has a conductivity type and a charge density. The semiconductor component als... | 04/17/2007 |
| 7173307 | Semiconductor device and manufacturing method thereof An aspect of the present invention provides a semiconductor device that includes a first conductivity type semiconductor body, a source region in contact with the semiconductor body, whose bandgap is different from that of the semiconductor body, and which formed he... | 02/06/2007 |
| 7157771 | Vertical device 4FEEPROM memory EEPROM memory devices and arrays are described that facilitate the use of vertical floating gate memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments of the present invention utilize vertical select gates and floating ga... | 01/02/2007 |
| 7132321 | Vertical conducting power semiconductor devices implemented by deep etch Semiconductor substrates suitable for making thin vertical current conducting devices are made by providing a relatively thick semiconducting substrate with at least one conductivity type having a thickness of from about 100 μm to 700 μm. At least one active devic... | 11/07/2006 |
| 7122858 | Nonvolatile semiconductor memory device including improved gate electrode A floating gate is formed on a semiconductor substrate via a gate insulating film. Diffused layers are formed as sources or drain regions on opposite sides of the floating gate in the semiconductor substrate. First and second control gates are formed opposite to bot... | 10/17/2006 |
| 7084456 | Trench MOSFET with recessed clamping diode using graded doping In a trench-gated MOSFET including an epitaxial layer over a substrate of like conductivity and trenches containing thick bottom oxide, sidewall gate oxide, and conductive gates, body regions of the complementary conductivity are shallower than the gates, and clamp ... | 08/01/2006 |
| 6686625 | Field effect-controllable semiconductor component with two-directional blocking, and a method of producing the semiconductor component The semiconductor component can be controlled by the field effect and it blocks in both directions. The component has a semiconductor body with a first connecting zone, a second connecting zone and a channel zone formed between the first and the second co... | 02/03/2004 |
| 6608350 | High voltage vertical conduction superjunction semiconductor device A high voltage vertical conduction semiconductor device has a plurality of deep trenches or holes in a lightly doped body of one conductivity type. A diffusion of the other conductivity type is formed in the trench walls to a depth and a concentration whi... | 08/19/2003 |
| 6605829 | Semiconductor device A DMOS transistor in which a main current flows between first and second main surfaces of a silicon substrate is formed. DMOS transistor has a p-type diffusion region formed in the first main surface, an n+ diffusion region formed in the first ... | 08/12/2003 |
| 6605841 | Method for producing an electrode by means of a field effect controllable semiconductor component and field-effect-controllable semiconductor component A field-effect-controllable semiconductor component and a method for fabricating an electrode of the component includes a semiconductor body having a first zone of a first conduction type, a second zone of a second conduction type disposed above the first... | 08/12/2003 |
| 6605862 | Trench semiconductor devices A semiconductor device, such as a MOSFET or PN diode rectifier, has a p-n junction (24) between a first device region (23) and an underlying voltage-sustaining zone (20). Trenched field-shaping regions (40) extend through the voltage-sustaining zone (20) ... | 08/12/2003 |
| 6603173 | Vertical type MOSFET A vertical power MOSFET, which can improve a surge withstand voltage and a surge withstand voltage against a surge voltage from an inductance load L. The vertical power MOSFET has a plurality of unit cells. The unit cell is formed from a MOSFET that uses ... | 08/05/2003 |
| 6602768 | MOS-gated power device with doped polysilicon body and process for forming same An improved MOS-gated power device 300 with a substrate 101 having an upper layer 101a of doped monocrystalline silicon of a first conduction type that includes a doped well region 107 of a second conduction type. The substrate further includes at least o... | 08/05/2003 |
| 6600193 | Trench MOSFET having implanted drain-drift region A trench MOSFET is formed in a structure which includes a P-type epitaxial layer overlying an N+ substrate. An N-type dopant is implanted through the bottom of the trench into the P-epitaxial layer to form a buried layer below the trench, and after a up-d... | 07/29/2003 |
| 6600194 | Field-effect semiconductor devices A field-effect semiconductor device, for example a MOSFET of the trench-gate type, comprises side-by-side device cells at a surface (10a) of a semiconductor body (10), and at least one drain connection (41) that extends in a drain trench (40) from the bod... | 07/29/2003 |
| 6593620 | Trench DMOS transistor with embedded trench schottky rectifier An integrated circuit having a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions. The integrated circuit includes: (a) a substrate of a fir... | 07/15/2003 |
| 6586833 | Packaged power devices having vertical power mosfets therein that are flip-chip mounted to slotted gate electrode strip lines Packaged power devices include an electrically conductive flange having a slot therein and an electrically conductive substrate mounted within the slot. A dielectric layer is provided on the electrically conductive substrate and a gate electrode strip lin... | 07/01/2003 |
| 6586800 | Trench-gate semiconductor devices A trench-gate MOSFET or ACCUFET has its gate (21) in a first trench (20) that extends through a channel-accommodating body region (15) to a drain region (14). Within the transistor cells, a second trench (40) comprising deposited highly-doped semiconducto... | 07/01/2003 |
| 6583010 | Trench transistor with self-aligned source A trench field-effect transistor with a self-aligned source. At least a portion of the source implantation dose (604) is implanted underneath the gate (610) of a trench transistor by implanting an a non-orthogonal angle to the sidewall (608) of the trench... | 06/24/2003 |
| 6580121 | Power semiconductor device containing at least one zener diode provided in chip periphery portion A Zener diode is provided in a chip periphery portion which entirely surrounds at a periphery a unit cell portion and a gate pad portion along first to fourth directions. The Zener diode has an N+ -P-N+ -P-N+ structure con... | 06/17/2003 |
| 6580123 | Low voltage power MOSFET device and process for its manufacture A trench type power MOSFET has a thin vertical gate oxide along its side walls and a thickened oxide with a rounded bottom at the bottom of the trench to provide a low RDSON and increased VDSMAX and VGSMAX and a reduced Mi... | 06/17/2003 |
