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| Number | Title | Issue Date |
| 7422953 | Semiconductor device and method of manufacturing the same There is provided a method of manufacturing a semiconductor device, including forming a structure including a first layer containing Si and a metal oxide layer in contact with the first layer, the metal oxide layer having a dielectric constant higher than that of si... | 09/09/2008 |
| 7397070 | Self-aligned transistor In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor. ... | 07/08/2008 |
| 7372101 | Sub-lithographics opening for back contact or back gate A low resistance buried back contact for SOI devices. A trench is etched in an insulating layer at minimum lithographic dimension, and sidewalls are deposited in the trench to decrease its width to sublithographic dimension. Conducting material is deposited in the t... | 05/13/2008 |
| 7321142 | Field effect transistor On an SiC single crystal substrate, an electric field relaxation layer and a p− type buffer layer are formed. The electric field relaxation layer is formed between the p− type buffer layer and the SiC single crystal substrate to contact SiC single crystal substr... | 01/22/2008 |
| 7300850 | Method of forming a self-aligned transistor In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor. ... | 11/27/2007 |
| 7268398 | ESD protection cell with active pwell resistance control In an NMOS device, the turn-on voltage or the triggering voltage is reduced by adding an NBL connected to an n-sinker and contacted through an n+ region, which is connected to a bias voltage. The bias voltage may be provided by the drain contact or by a separate bia... | 09/11/2007 |
| 7235827 | Vertical power JFET with low on-resistance for high voltage applications A junction field effect transistor (JFET) has a gate region, drain region, and a source region. An epitaxial region having a first conductivity type is disposed over the drain region. The first conductivity type is N-type semiconductor material. The gate region is d... | 06/26/2007 |
| 7183596 | Composite gate structure in an integrated circuit An integrated circuit having composite gate structures and a method of forming the same are provided. The integrated circuit includes a first MOS device, a second MOS device and a third MOS device. The gate stack of the first MOS device includes a high-k gate dielec... | 02/27/2007 |
| 7166876 | MOSFET with electrostatic discharge protection structure and method of fabrication A semiconductor circuit comprises a semiconductor substrate, a semiconductor device having a drain region disposed in the substrate, and a reverse doped region laterally adjacent and laterally contacting the drain region wherein the reverse doped region has an oppos... | 01/23/2007 |
| 7166889 | Semiconductor memory device having a gate electrode and a method of manufacturing thereof A first aspect of the present invention is providing a non-volatile semiconductor memory device, comprising: a memory cell having a tunnel oxide layer formed on a semiconductor substrate, a floating gate formed on the tunnel oxide layer, a control gate to which volt... | 01/23/2007 |
| 6600192 | Vertical field-effect semiconductor device with buried gate region A buried gate region, a buried gate contact region and a gate contact region are provided on an SiC substrate. Thereby, a depletion layer expands in the channel region, and a high withstand voltage is attained in the normally off state. By applying a volt... | 07/29/2003 |
| 6528370 | Semiconductor device and method of manufacturing the same Provided are a semiconductor device which shows excellent negative differential conductance or negative transconductance and is manufactured without a complicated manufacturing process and a method of manufacturing the same. The semiconductor device inclu... | 03/04/2003 |
| 6469315 | Semiconductor device and method of manufacturing the same Provided are a semiconductor device which shows excellent negative differential conductance or negative transconductance and is manufactured without a complicated manufacturing process and a method of manufacturing the same. The semiconductor device inclu... | 10/22/2002 |
| 6465844 | Power semiconductor device and method of manufacturing the same A power semiconductor device has a plurality of U-shaped buried layers buried in a drift layer and made of either an insulating material or a semiconductor having a wider bandgap than that of the semiconductor of the drift layer. The ratio of the product ... | 10/15/2002 |
| 6351004 | Tunneling transistor applicable to nonvolatile memory A tunneling transistor is provided as an effective means for miniaturization of a semiconductor integrated circuit having nonvolatile memory. An insulating layer is disposed on a silicon substrate. A source and a drain are disposed on the insulating layer... | 02/26/2002 |
| 6320220 | Quantum tunneling effect device and semiconductor composite substrate A new switching element and a circuit device and the like using the same element are provided, which comprises semiconductor in which a channel region is formed at an interface with an insulating film, first and second terminals S, D, which are located in... | 11/20/2001 |
| 6291242 | Methods for generating polynucleotides having desired characteristics by iterative selection and recombination A method for DNA reassembly after random fragmentation, and its application to mutagenesis of nucleic acid sequences by in vitro or in vivo recombination is described. In particular, a method for the production of nucleic acid fragments or polynucleotides... | 09/18/2001 |
| 6211531 | Controllable conduction device A controllable conduction device in the form of a transistor comprises source and drain regions 5, 2 between which extends a conduction path P for charge carriers, a gate 4 for controlling charge carrier flow along the conduction path and a multiple layer... | 04/03/2001 |
| 6198113 | Electrostatically operated tunneling transistor A transistor operated by changing the electrostatic potential of an island disposed between two tunnel junctions. The transistor has an island of material which has a band gap (e.g. semiconductor material). Source and drain contacts are provided. The tran... | 03/06/2001 |
| 6169308 | Semiconductor memory device and manufacturing method thereof A high speed/large capacity DRAM (Dynamic Random Access Memory) is generally refreshed each 0.1 sec because it loses information stored therein due to a leakage current. The DRAM also loses information stored therein upon cutoff of a power source. Meanwhi... | 01/02/2001 |
| 6139483 | Method of forming lateral resonant tunneling devices A method of fabricating a quantum well device is presented which includes forming one or more quantum wells 48 by forming an epitaxy mask followed by selective deposition of one or more epitaxial layers. Selective deposition is accomplished by forming an ... | 10/31/2000 |
| 6111288 | Quantum tunneling effect device and semiconductor composite substrate A new switching element and a circuit device and the like using the same element are provided, which comprises semiconductor in which a channel region is formed at an interface with an insulating film, first and second terminals S, D, which are located in... | 08/29/2000 |
| 6080996 | Unipolar three-terminal resonant-tunneling transistor The present invention discloses both an n+ and a p+ unipolar, three-terminal, resonant-tunneling transistor that can be operated as a hot-electron transistor or a field effect transistor at temperatures at least as low as 77 degree Kelvin. The doped first... | 06/27/2000 |
| 6060723 | Controllable conduction device A controllable conduction device in the form of a transistor comprises source and drain regions 5, 2 between which extends a conduction path P for charge carriers, a gate 4 for controlling charge carrier flow along the conduction path and a multiple layer... | 05/09/2000 |
| 6043518 | Multiple-function GaAs transistors with very strong negative differential resistance phenomena Disclosed in this invention is a new four-terminal type and multiple delta-doped transistors with multiple functions grown by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). All the epilayers are grown on n+ -GaAs substrates. Th... | 03/28/2000 |
| 6031245 | Semiconductor device A semiconductor device is presented which exhibits both interband and intraband tunnelling. The device comprises two active layers (21, 23) which are sandwiched between two barrier layers (3, 5). These layers are located between first and second terminals... | 02/29/2000 |
| 5994714 | Quantum diffraction transistor The present invention discloses a technique for applying diffraction characteristic of electrons to a two-dimensional electronic device to manufacture multi-functional transistor having various ON/OFF states. A quantum diffraction transistor according to ... | 11/30/1999 |
| 5989947 | Method for the manufacture of quantum structures, in particular quantum dots and tunnel barriers as well as components with such quantum structures A method of manufacturing quantum structures, in particular quantum dots and tunnel barriers and also a component with such quantum structures wherein in that a substrate is structured by the intentional formation of trenches so that material remains betw... | 11/23/1999 |
| 5962864 | Gated resonant tunneling device and fabricating method thereof A semiconductor device comprises mutually separated first and third barrier layers interposed between the first and second patterned terminals. The device operates by the resonant tunneling of carriers from the second terminal to the first terminal. The f... | 10/05/1999 |
| 5952692 | Memory device with improved charge storage barrier structure A memory device includes a memory node (1) to which charge is written through a tunnel barrier configuration (2) from a control electrode (9). The stored charge effects the conductivity of a source/drain path (4) and data is read by monitoring the conduct... | 09/14/1999 |
| 5949103 | MOSFET with tunneling insulation and fabrication method thereof A tunneling insulation film MOSFET and a fabrication method for a tunneling insulation film MOSFET avoid a short channel effect and prevent a punchthrough phenomenon by forming a tunneling insulation film between a channel area and one of source area and ... | 09/07/1999 |
| 5942790 | Charge effect transistor and a method for manufacturing the same A new conceptional transistor and a method for manufacturing, which increases the integration of semiconductor devices using conventional MOS devices are provided. The present invention provides a transistor in which a structure of metal-insulator film-me... | 08/24/1999 |
| 5940696 | Method of manufacturing a quantum diffraction transistor The present invention discloses a technique for applying diffraction characteristics of electrons to a two-dimensional electronic device to manufacture multi-functional transistor having various ON/OFF states. Method of manufacturing a quantum diffraction... | 08/17/1999 |
| 5895931 | Semiconductor device A barrier layer (AlAs) is formed on a source layer (n-GaAs), and a drain layer (n-GaAs) and a gate layer (p-GaAs) adjacent to the drain layer are formed on the barrier layer. If the drain layer is biased to a plus voltage with the source layer, then a tun... | 04/20/1999 |
| 5880484 | Lateral resonant tunneling transistor having two non-symmetric quantum dots A lateral resonant tunneling transistor having two non-symmetric quantum dots is disclosed. When a negative voltage is supplied to each plurality of thin split gates, two non-symmetric quantum dots are formed owing to the formation of the potential barrie... | 03/09/1999 |
| 5856681 | Semiconductor device The present invention relates to a semiconductor device in which an electric resistance in a carrier path is modulated by changing a voltage applied to the carrier path. The semiconductor device is provided with a semiconductor layer in which conductive p... | 01/05/1999 |
| 5834793 | Semiconductor devices A semiconductor device has a semiconductor substrate, a source and a drain region, each formed at the surface of said semiconductor substrate, and each having a potential barrier with respect to the semiconductor substrate. A gate electrode is formed on t... | 11/10/1998 |
| 5825049 | Resonant tunneling device with two-dimensional quantum well emitter and base layers A double electron layer tunneling device is presented. Electrons tunnel from a two dimensional emitter layer to a two dimensional tunneling layer and continue traveling to a collector at a lower voltage. The emitter layer is interrupted by an isolation et... | 10/20/1998 |
| 5804475 | Method of forming an interband lateral resonant tunneling transistor This invention describes a nanometer scale interband lateral resonant tunneling transistor, and the method for producing the same, with lateral geometry, good fanout properties and suitable for incorporation into large-scale integrated circuits. The trans... | 09/08/1998 |
| 5793055 | Hybrid electronic devices, particularly Josephson transistors A step junction is provided for superconductor/semiconductor heterostructure hybrid devices like tunneling transistors, in a body of p-InAs with a vertical side connecting the low plateau and high plateau on which superconductors, preferably of niobium, a... | 08/11/1998 |