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| Number | Title | Issue Date |
| 7375410 | Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof The present invention provides a “collector-less” silicon-on-insulator (SOI) bipolar junction transistor (BJT) that has no impurity-doped collector. Instead, the inventive vertical SOI BJT uses a back gate-induced, minority carrier inversion layer as the intrins... | 05/20/2008 |
| 7364997 | Methods of forming integrated circuitry and methods of forming local interconnects In one implementation, field oxide is grown within bulk semiconductive material in a first circuitry area and not over immediately adjacent bulk semiconductive material in a second circuitry area. The field oxide is etched from the first circuitry area. After the et... | 04/29/2008 |
| 7288829 | Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the... | 10/30/2007 |
| 7276754 | Annular gate and technique for fabricating an annular gate A memory structure having a vertically oriented access transistor with an annular gate region and a method for fabricating the structure. More specifically, a transistor is fabricated such that the channel of the transistor extends outward with respect to the surfac... | 10/02/2007 |
| 7170106 | Power semiconductor device A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base laye... | 01/30/2007 |
| 7164174 | Single poly-emitter PNP using dwell diffusion in a BiCMOS technology A method of forming a bipolar transistor device, and more particularly a vertical poly-emitter PNP transistor, as part of a BiCMOS type manufacturing process is disclosed. The formation of the PNP transistor during a CMOS/DMOS fabrication process requires merely one... | 01/16/2007 |
| 6703687 | Bipolar transistor and method for manufacturing the same A bipolar transistor and a method for manufacturing the bipolar transistor are provided. The bipolar transistor includes a collector region including a semiconductor substrate doped with a first conductive dopant, an intrinsic base region low-density dope... | 03/09/2004 |
| 6696342 | Small emitter and base-collector bi-polar transistor In a high speed BJT device, the method for producing the device includes forming a self-aligned BJT through the use of a single mask by making use of a single layer of polysilicon. The method includes forming a window in the polysilicon to define a base p... | 02/24/2004 |
| 6693308 | Power SiC devices having raised guard rings Silicon carbide semiconductor power devices having epitaxially grown guard rings edge termination structure are provided. Forming the claimed guard rings from an epitaxially grown SiC layer avoids the traditional problems associated with implantation of g... | 02/17/2004 |
| 6664609 | High frequency differential amplification circuit with reduced parasitic capacitance Disclosed is a circuit layout of a differential amplification circuit that constitutes a Gilbert cell, in which two multiple finger bipolar transistors forming a differential amplifier are positioned substantially axially symmetrical to each other. The lo... | 12/16/2003 |
| 6649983 | Vertical bipolar transistor formed using CMOS processes A vertical bipolar transistor is described which utilizes ion implantation steps which are used to form an nMOS field effect device and a pMOS field effect device. The implantation steps form an n-well, a p-well region, a pocket base region and an emitter... | 11/18/2003 |
| 6617220 | Method for fabricating an epitaxial base bipolar transistor with raised extrinsic base An epitaxial base bipolar transistor including an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on a portion of the single crystal layer; a raised extrinsic base on a surface of the semiconductor substrate; an insul... | 09/09/2003 |
| 6521974 | Bipolar transistor and manufacturing method thereof A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si--Ge and a base leading-out electrode are connected via a link base made of polycrystal Si--Ge by doping at high concentration, furt... | 02/18/2003 |
| 6498368 | Power semiconductor device In a semiconductor device having a first terminal 101 (source terminal) and a second terminal 102 (drain terminal), the substrate main surface of a semiconductor chip is on the (110) face, the main contact face of an n-type region 2 and a p-type region 4 ... | 12/24/2002 |
| 6482710 | Bipolar transistor and manufacting method thereof A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si--Ge and a base leading-out electrode are connected via a link base made of polycrystal Si--Ge by doping at high concentration, furt... | 11/19/2002 |
| 6475848 | Polysilicon-edge, low-power, high-frequency bipolar transistor and method of forming the transistor A low-power high-frequency bipolar transistor is formed to have a small self-aligned base region that reduces the base-to-collector capacitance, and small self-aligned base and emitter contacts that reduce the base-to-emitter capacitance and the base resi... | 11/05/2002 |
| 6469366 | Bipolar transistor with collector diffusion layer formed deep in the substrate A semiconductor device allowing reduction in area occupied by a bipolar transistor as well as a method of manufacturing the same are obtained. The semiconductor device includes a substrate, first conductivity type regions, a collector region, base regions... | 10/22/2002 |
| 6440810 | Method in the fabrication of a silicon bipolar transistor In the fabrication of a silicon bipolar transistor, a method for forming base regions and for opening an emitter window is provided. A silicon substrate is provided with suitable device isolation. A first base region is formed in or on top of the substrat... | 08/27/2002 |
| 6420771 | Trench isolated bipolar transistor structure integrated with CMOS technology A bipolar transistor is vertically isolated from underlying silicon by an isolation layer of conductivity type opposite that of the collector. This isolation layer lies beneath the heavily doped buried layer portion of the collector, and is formed either ... | 07/16/2002 |
| 6404001 | Multilevel conductive interconnections including capacitor electrodes for integrated circuit devices Conductive plugs are formed in a first insulating layer on an integrated circuit substrate. A first conductive layer, a capacitor dielectric film and a second conductive layer are formed on the first insulating layer including on the conductive plugs. The... | 06/11/2002 |
| 6403437 | Method for making hyperfrequency transistor A bipolar transistor including an extrinsic base on the surface of a silicon substrate covered by a first layer of doped polycrystalline silicon, an intrinsic base that is separated from the extrinsic base and covered by a second layer of polycrystalline ... | 06/11/2002 |
| 6380017 | Polysilicon-edge, base-emitter super self-aligned, low-power, high-frequency bipolar transistor and method of forming the transistor A low-power high-frequency bipolar transistor is formed to have a small self-aligned intrinsic base region, and small self-aligned extrinsic base and emitter regions that contact the intrinsic base region. The small regions reduce the base resistance, the... | 04/30/2002 |
| 6331727 | Semiconductor device and method of fabricating the same This invention includes a semiconductor substrate of one conductivity type having a semiconductor layer of an opposite conductivity type from an upper surface to a predetermined depth and first and second projections on the semiconductor layer of the oppo... | 12/18/2001 |
| 6329699 | Bipolar transistor with trenched-groove isolation regions The invention relates to semiconductor devices having a bipolar transistor to form an isolation area within a base electrode contact area to ensure stable contact of the base electrode. The bipolar transistor formed in the transistor area is in the form o... | 12/11/2001 |
| 6329675 | Self-aligned bipolar junction silicon carbide transistors A method of fabricating a self-aligned bipolar junction transistor in a semiconductor structure having a first layer of silicon carbide generally having a first conductivity type and a second layer of silicon carbide generally having a second conductivity... | 12/11/2001 |
| 6329698 | Forming a self-aligned epitaxial base bipolar transistor An improved method and an apparatus for forming a self-aligned epitaxial base bipolar transistor in a semiconductor material is disclosed. The method of the invention involves forming an intrinsic base region formed by growing an epitaxial semiconductor m... | 12/11/2001 |
| 6309938 | Deuterated bipolar transistor and method of manufacture thereof A bipolar transistor and a method of manufacturing the transistor. The transistor includes: (1) a substrate having a base region, an emitter region and a base-emitter junction between said base and emitter regions and (2) a substantial concentration of an... | 10/30/2001 |
| 6255184 | Fabrication process for a three dimensional trench emitter bipolar transistor A process for fabricating a bipolar junction transistor, featuring an N type, polysilicon emitter structure, located in an emitter trench, and featuring a narrow width. P type base region, located directly underlying an N type, emitter region, which is fo... | 07/03/2001 |
| 6239475 | Vertical bipolar transistor having a field shield between the metallic interconnecting layer and the insulation oxide The present invention relates to a vertical bipolar power transistor primarily intended for radio frequency applications and to a method for manufacturing, the bipolar power transistor. The power transistor comprises a substrates, a collector layer of a f... | 05/29/2001 |
| 6225181 | Trench isolated bipolar transistor structure integrated with CMOS technology A bipolar transistor is vertically isolated from underlying silicon by an isolation layer of conductivity type opposite that of the collector. This isolation layer lies beneath the heavily doped buried layer portion of the collector, and is formed either ... | 05/01/2001 |
| 6218254 | Method of fabricating a self-aligned bipolar junction transistor in silicon carbide and resulting devices A method of fabricating a self-aligned bipolar junction transistor in a semiconductor structure having a first layer of silicon carbide generally having a first conductivity type and a second layer of silicon carbide generally having a second conductivity... | 04/17/2001 |
| 6211028 | Twin current bipolar device with hi-lo base profile A bipolar transistor is described whose I-V curve is such that it operates in two regions, one having low gain and low power consumption and another having higher gain and better current driving ability. Said transistor has a base region made up of two su... | 04/03/2001 |
| 6156616 | Method for fabricating an NPN transistor in a BICMOS technology The present invention relates to a bipolar transistor of NPN type implemented in an epitaxial layer within a window defined in a thick oxide layer, including an opening formed substantially at the center of the window, this opening penetrating into the ep... | 12/05/2000 |
| 6118171 | Semiconductor device having a pedestal structure and method of making A semiconductor device (10) is formed in a pedestal structure (16) overlying a semiconductor substrate (11). The semiconductor device (10) includes a base region (44) that contacts the corners (13) of the pedestal structure (16). Electrical connection to ... | 09/12/2000 |
| 6114212 | Methods of fabricating bipolar junction transistors having an increased safe operating area A bipolar junction transistor includes a semiconductor substrate having a surface, a base region of first conductivity type in the substrate, and an emitter region of second conductivity type extending from the surface into the base region to form a gener... | 09/05/2000 |
| 6084284 | Integrated circuit including inverted dielectric isolation A method of semiconductor fabrication includes the steps of forming a dielectric layer on a first surface of a semiconductor wafer having a plurality of laterally distributed semiconductor devices selectively interconnected on the first surface and bondin... | 07/04/2000 |
| 6077753 | Method for manufacturing vertical bipolar transistor having a field shield between an interconnecting layer and the field oxide The present invention relates to a vertical bipolar power transistor primarily intended for radio frequency applications and to a method for manufacturing the bipolar power transistor. The power transistor comprises a substrate (13), a collector layer (15... | 06/20/2000 |
| 6069404 | Arrangement for the reduction of noise in microwave transistors and method for the manufacture thereof A structure for a microwave device in which the minimum noise figure is reduced in that underneath the base terminal surface of a transistor, a highly-doped trenched layer is formed, which layer is connected to a reference potential in the vicinity of the... | 05/30/2000 |
| 6043552 | Semiconductor device and method of manufacturing the semiconductor device In order to prevent an epitaxial layer from contamination by metal when the epitaxial layer is formed on a substrate on which a conductor film comprising a metallic film is formed, a bipolar transistor (semiconductor device) 1 has the first conductor patt... | 03/28/2000 |
| 6043553 | Multi-emitter bipolar transistor of a self-align type To provide a semiconductor device including a self-align type multi-emitter bipolar transistor wherein every collector-base isolation length can be reduced into a minimum value allowed in connection with the collector-base breakdown voltage, in a self-ali... | 03/28/2000 |
