Class 257/E29.165 - Multiple layers (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.162. This
No. of patents: 402
Last issue date: 10/14/2008

«First «Previous1 2 3 4 5 6 7 8 9 10 11 Next»Last»

Number	Title	Issue Date
7435628	Method of forming a vertical MOS transistor A vertical MOS transistor has a source region, a channel region, and a drain region that are vertically stacked, and a trench that extends from the top surface of the drain region through the drain region, the channel region, and partially into the source region. Th...	10/14/2008
7397094	Semiconductor device and manufacturing method thereof To provide a semiconductor device that enables to suppress a defect density of a gate insulating film of an MISFET, gain a sufficient electric characteristic thereof, and make an Equivalent Oxide Thickness (EOT) of the gate insulating film 1.0 nm or less. The MISFET...	07/08/2008
7315083	Circuit device and manufacturing method thereof A circuit device suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, and a manufacturing method thereof are provided. According to a hybrid integrated circuit device of the present invention and a manufacturing m...	01/01/2008
7312498	Nonvolatile semiconductor memory cell and method of manufacturing the same A stacked-gate structure includes a tunnel insulation film, a floating gate electrode, an inter-electrode insulation film and a control gate electrode, which are stacked on a semiconductor substrate. The inter-electrode insulation film has a three-layer structure th...	12/25/2007
7294547	SONOS memory cell having a graded high-K dielectric A semiconductor memory device may include an intergate dielectric layer of high-K dielectric materials interposed between a charge storing layer and a control gate. The high-K materials may be deposited in such a manner that the materials are gradually graded with r...	11/13/2007
7238997	Semiconductor device and method of manufacturing the same According to an aspect of the present invention, there is disclosed a semiconductor device comprising a semiconductor substrate, and a gate insulating film of a P-channel MOS transistor, formed on the semiconductor substrate. The gate insulating film has an oxide fi...	07/03/2007
7160818	Semiconductor device and method for fabricating same An aspect of the present invention includes; a silicon oxynitride film having an oxynitride layer which is formed on at least the surface of a silicon substrate and in which nitrogen atoms are in a three-coordinate bond state, and a silicon oxide layer which is form...	01/09/2007
7053009	Nanolaminate film atomic layer deposition method An atomic layer deposition method to deposit an oxide nanolaminate thin film is provided. The method employs a nitrate ligand in a first precursor as an oxidizer for a second precursor to form the oxide nanolaminates. Using a hafnium nitrate precursor and an aluminu...	05/30/2006
7005695	Integrated circuitry including a capacitor with an amorphous and a crystalline high K capacitor dielectric region The invention comprises integrated circuitry and to methods of forming capacitors. In one implementation, integrated circuitry includes a capacitor having a first capacitor electrode, a second capacitor electrode and a high K capacitor dielectric region received the...	02/28/2006
6703708	Graded thin films Thin films are formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of imp...	03/09/2004
6700771	Decoupling capacitor for high frequency noise immunity Systems and methods are provided for an on-chip decoupling device and method. One aspect of the present subject matter is a capacitor. One embodiment of the capacitor includes a substrate, a high K dielectric layer doped with nano crystals disposed on the...	03/02/2004
6696332	Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing Methods are disclosed for forming gate dielectrics for MOSFET transistors, wherein a bilayer deposition of a nitride layer and an oxide layer are used to form a gate dielectric stack. The nitride layer is formed on the substrate to prevent oxidation of th...	02/24/2004
6696327	Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, then forming a capping layer on the high-k gate dielectric layer. After oxidizing the capping layer to form a capping die...	02/24/2004
6693004	Interfacial barrier layer in semiconductor devices with high-K gate dielectric material A semiconductor device and a process for fabricating the device, including, in one embodiment, a silicon substrate; a first interfacial barrier layer on the silicon substrate, in which the first interfacial barrier layer may include aluminum oxide, silico...	02/17/2004
6693321	Replacing layers of an intergate dielectric layer with high-K material for improved scalability A method of making and a semiconductor device formed on a semiconductor substrate having an active region. The semiconductor device includes a gate dielectric layer disposed on the semiconductor substrate. A floating gate is formed on the gate dielectric ...	02/17/2004
6689702	High dielectric constant metal oxide gate dielectrics A method of forming a dielectric layer suitable for use as the gate dielectric layer of a metal-oxide-semiconductor field effect transistor (MOSFET) includes oxidizing the surface of a silicon substrate, forming a metal layer over the oxidized surface, an...	02/10/2004
6690047	MIS transistor having a large driving current and method for producing the same In a MIS transistor, the top surfaces of source/drain regions (S/D diffusion layers) formed on a semiconductor substrate 1 are arranged nearer to a gate electrode than a channel plane on the semiconductor substrate, and the top surfaces of the source/drai...	02/10/2004
6690030	Semiconductor device with negative differential resistance characteristics A gate oxide film formed on the surface of a silicon substrate is partly reduced in thickness or "thinned" at its specified part overlying a source region. In a gate region, a multilayer structure is formed which includes a first polycrystalline silicon o...	02/10/2004
6686264	Methods of forming binary noncrystalline oxide analogs of silicon dioxide A non-crystalline oxide is represented by the formula: ABO4 wherein A is an element selected from Group IIIA of the periodic table; and B is an element selected from Group VB of the periodic table....	02/03/2004
6682973	Formation of well-controlled thin SiO, SiN, SiON layer for multilayer high-K dielectric applications A process for fabricating a semiconductor device having a high-K dielectric layer over a silicon substrate, including steps of growing on the silicon substrate an interfacial layer of a silicon-containing dielectric material; and depositing on the interfa...	01/27/2004
6680261	Method of reducing boron outgassing at trench power IC's oxidation process for sacrificial oxide layer Embodiments of the present invention are directed to a method of reducing boron outgassing at trench power IC's oxidation process for the sacrificial oxide layer whereby the threshold voltage of the power ICs can be improved and the yield of the product c...	01/20/2004
6677213	SONOS structure including a deuterated oxide-silicon interface and method for making the same A method for processing a semiconductor topography is provided, which includes diffusing deuterium across one or more interfaces of a silicon-oxide-nitride-oxide-silicon (SONOS) structure. In particular, the method may include diffusing deuterium across o...	01/13/2004
6674138	Use of high-k dielectric materials in modified ONO structure for semiconductor devices A process for fabrication of a semiconductor device including a modified ONO structure, including forming the modified ONO structure by providing a semiconductor substrate; forming a first oxide layer on the semiconductor substrate; depositing a layer com...	01/06/2004
6674124	Trench MOSFET having low gate charge A trench MOSFET device comprising: (a) a silicon substrate of a first conductivity type (preferably N-type conductivity); (b) a silicon epitaxial layer of the first conductivity type over the substrate, the epitaxial layer having a lower majority carrier ...	01/06/2004
6674135	Semiconductor structure having elevated salicided source/drain regions and metal gate electrode on nitride/oxide dielectric A semiconductor structure an a process for its manufacture. First and second gate dielectric layers are formed on a semiconductor substrate between nitride spacers, and a metal gate electrode is formed on the gate dielectric layers. Lightly-doped drain re...	01/06/2004
6670248	Triple gate oxide process with high-k gate dielectric A method for forming, on a semiconductor substrate, a dielectric layer having a variable thickness and composition. The dielectric layer so formed can be used to form electronic devices such as MOSFETS and CMOSFETS that require gate dielectrics of differe...	12/30/2003
6670242	Method for making an integrated circuit device including a graded, grown, high quality gate oxide layer and a nitride layer A method for making an integrated circuit device includes forming source and drain regions in a semiconductor substrate and defining a channel region therebetween, forming a graded, grown, gate oxide layer adjacent the channel region, forming a nitride la...	12/30/2003
6664186	Method of film deposition, and fabrication of structures A method of fabricating aluminum oxide films utilizing aluminum alkoxide precursors is described. The aluminum oxide film is formed by (a) providing an aluminum alkoxide precursor that is dissolved, emulsified or suspended in a liquid; (b) providing a vap...	12/16/2003
6661065	Semiconductor device and SOI substrate A systematized semiconductor device having a gate insulating film which can be formed thinner than a silicon oxide film and which is less susceptible to deterioration. Further, a semiconductor device having improved reliability in which an insulating film...	12/09/2003
6656804	Semiconductor device and production method thereof The present invention provides a MOS semiconductor device which enables gate leakage current reduction with a thinner gate dielectric film for higher speed, and a production method thereof. According to the present invention, a gate dielectric film 6 is m...	12/02/2003
6657267	Semiconductor device and fabrication technique using a high-K liner for spacer etch stop A semiconductor device and method of fabrication are disclosed. The semiconductor device includes a liner composed of a high-K material. The liner has a portion separating a sidewall spacer from a gate and a portion separating the sidewall spacer from a l...	12/02/2003
6649543	Methods of forming silicon nitride, methods of forming transistor devices, and transistor devices The invention encompasses a method of forming silicon nitride on a silicon-oxide-comprising material. The silicon-oxide-comprising material is exposed to activated nitrogen species from a nitrogen-containing plasma to introduce nitrogen into an upper port...	11/18/2003
6645882	Preparation of composite high-K/standard-K dielectrics for semiconductor devices A semiconductor device and a method of fabricating the semiconductor device having a composite dielectric layer including steps of providing a semiconductor substrate; depositing on the semiconductor substrate alternating sub-layers of a first dielectric ...	11/11/2003
6642573	Use of high-K dielectric material in modified ONO structure for semiconductor devices A process for fabrication of a semiconductor device including a modified ONO structure, comprising forming the modified ONO structure by providing a semiconductor substrate; forming a first dielectric material layer on the semiconductor substrate; deposit...	11/04/2003
6642131	METHOD OF FORMING A SILICON-CONTAINING METAL-OXIDE GATE DIELECTRIC BY DEPOSITING A HIGH DIELECTRIC CONSTANT FILM ON A SILICON SUBSTRATE AND DIFFUSING SILICON FROM THE SUBSTRATE INTO THE HIGH DIELECTRIC CONSTANT FILM A gate electrode is formed on a substrate via a gate insulating film. The gate insulating film includes a high dielectric constant film containing a metal, oxygen and hydrogen, and a lower barrier film formed below the high dielectric constant film and co...	11/04/2003
6642117	Method for forming composite dielectric layer A method for forming a dielectric layer provides that a oxidizable substrate has formed thereupon a thermal oxide layer in turn having formed thereupon a deposited nitride layer. The deposited nitride/thermal oxide stack layer is then sequentially: (1) an...	11/04/2003
6639271	Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same A method of fabricating a dual bit dielectric memory cell structure on a silicon substrate includes implanting buried bit lines within the substrate and fabricating a layered island on the surface of the substrate between the buried bit lines. The island ...	10/28/2003
6638825	Method for fabricating a high voltage device A high voltage device and a method for fabricating the same are disclosed, which improves voltage-resistant characteristics to protect against high voltage applied to a gate electrode. The high voltage device includes a semiconductor substrate having firs...	10/28/2003
6635530	Methods of forming gated semiconductor assemblies The invention includes a method of forming a gated semiconductor assembly. A first transistor gate layer is formed over a substrate. A silicon nitride layer is formed over the first transistor gate layer. The silicon nitride layer comprises a first portio...	10/21/2003
6632729	Laser thermal annealing of high-k gate oxide layers A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a semiconductor substrate having a surface; (b) forming a gate oxide layer on at least a portion of the surface and including an interface therewith, the gate oxide lay...	10/14/2003

«First «Previous1 2 3 4 5 6 7 8 9 10 11 Next»Last»

PatentStorm

Bizarre Patents

PatentStorm News

Class 257/E29.165 - Multiple layers (EPO)