Class 257/E29.158 - Elemental metal gate conductor material (e.g., W, Mo) (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.15. This
No. of patents: 86
Last issue date: 07/15/2008

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Number	Title	Issue Date
7400020	Conductive niobium oxide gate MOSFET MOSFET gate structures are provided comprising a niobium monoxide gate, overlying a gate dielectric. The niobium monoxide gate may have a low work function suitable for use as an NMOS gate. ...	07/15/2008
7358171	Method to chemically remove metal impurities from polycide gate sidewalls An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a metal gate electrode. An embodiment also relates to a system that achieves the process. An embodiment also...	04/15/2008
7176079	Method of fabricating a semiconductor device with a wet oxidation with steam process A method of fabricating a semiconductor device includes depositing a dielectric film and subjecting the dielectric film to a wet oxidation in a rapid thermal process chamber. The technique can be used, for example, in the formation of various elements in an integrat...	02/13/2007
7164171	Semiconductor device and fabrication method thereof For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate...	01/16/2007
7141858	Dual work function CMOS gate technology based on metal interdiffusion A gate structure for a MOSFET device comprises a gate insulation layer, a first layer of a first metal abutting the gate insulation layer, and a second layer overlying the first layer and comprising a mixture of the metal of the first layer and a second metal, the m...	11/28/2006
7126199	Multilayer metal gate electrode A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate. A metal barrier layer may be formed over the gate dielectric. A work...	10/24/2006
7091118	Replacement metal gate transistor with metal-rich silicon layer and method for making the same A semiconductor device with a replacement metal gate and the process for making the same removes a dummy gate from a semiconductor device. Within the recess left by the dummy gate is a silicon layer on a gate dielectric layer. A replacement metal is deposited on the...	08/15/2006
6664592	Semiconductor device with groove type channel structure A semiconductor device includes a semiconductor substrate, a gate insulator film formed on a bottom surface and a side surface of a groove formed in the semiconductor substrate, a gate electrode having a lower portion buried in the groove on whose bottom ...	12/16/2003
6664186	Method of film deposition, and fabrication of structures A method of fabricating aluminum oxide films utilizing aluminum alkoxide precursors is described. The aluminum oxide film is formed by (a) providing an aluminum alkoxide precursor that is dissolved, emulsified or suspended in a liquid; (b) providing a vap...	12/16/2003
6664154	Method of using amorphous carbon film as a sacrificial layer in replacement gate integration processes An exemplary embodiment relates to a method of using amorphous carbon in replacement gate integration processes. The method can include depositing an amorphous carbon layer above a substrate, patterning the amorphous carbon layer, depositing a dielectric ...	12/16/2003
6653700	Transistor structure and method of fabrication A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gat...	11/25/2003
6649462	Semiconductor device and method of manufacturing the same including T-shaped gate A gate insulating film is provided on a channel region. A gate electrode includes a lower part and an upper part. The lower part has a lower surface and sides, and the upper part has a lower surface. The lower surface of the lower part contacts the gate i...	11/18/2003
6638824	Metal gate double diffusion MOSFET with improved switching speed and reduced gate tunnel leakage A double-diffused metal-oxide-semiconductor ("DMOS") field-effect transistor (10) with a metal gate (26). A sacrificial gate layer is patterned to provide a self-aligned source mask. The source regions (20) are thus aligned to the gate (26), and the sourc...	10/28/2003
6621114	MOS transistors with high-k dielectric gate insulator for reducing remote scattering The present invention relates to a MOS transistor structure and method of manufacture which provides a high-k dielectric gate insulator for reduced gate current leakage while concurrently reducing remote scattering, thereby improving transistor carrier mo...	09/16/2003
6614082	Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t...	09/02/2003
6613654	Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t...	09/02/2003
6603181	MOS device having a passivated semiconductor-dielectric interface A MOS structure processed to have a semiconductor-dielectric interface that is passivated to reduce the interface state density. An example is a MOSFET having a gate dielectric on which an electrode is present that is substantially impervious to molecular...	08/05/2003
6518154	Method of forming semiconductor devices with differently composed metal-based gate electrodes MOS transistors and CMOS devices comprising a plurality of transistors including metal-based gate electrodes of different composition are formed by a process comprising: depositing a first blanket layer of a first metal on a thin gate insulator layer exte...	02/11/2003
6515338	Semiconductor device and manufacturing method therefor A method of manufacturing semiconductor device comprises the steps of forming a first film and a second film on a semiconductor substrate, selectively removing the second film, the first film and a top portion of the semiconductor substrate to form a firs...	02/04/2003
6515320	Semiconductor device and method of manufacturing the same including thicker insulating layer on lower part of electrode A gate insulating film is provided on a channel region. A gate electrode includes a lower part and an upper part. The lower part has a lower surface and sides, and the upper part has a lower surface. The lower surface of the lower part contacts the gate i...	02/04/2003
6482714	Semiconductor device and method of manufacturing the same Disclosed is a semiconductor device comprising a transistor structure including an epitaxial silicon layer formed on a main surface of an n-type semiconductor substrate, source-drain diffusion layers formed on at least the epitaxial silicon layer, a chann...	11/19/2002
6475874	Damascene NiSi metal gate high-k transistor A method for implementing a self-aligned low temperature metal silicide gate is achieved by confining amorphous silicon within a recess overlying a channel and annealing to cause the amorphous silicon with its overlying low temperature silicidation metal ...	11/05/2002
6399444	Method of making floating gate non-volatile memory cell with low erasing voltage A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer ...	06/04/2002
6346450	Process for manufacturing MIS transistor with self-aligned metal grid This invention relates to a MIS transistor and its manufacturing process. The process comprises the following steps: a) production of a dummy grid on a substrate, made of a material capable of resisting heat treatment, b) formation of self-aligned source and d...	02/12/2002
6342414	Damascene NiSi metal gate high-k transistor A method for implementing a self-aligned low temperature metal silicide gate is achieved by confining a low temperature silicidation metal within a recess overlying a channel and annealing to cause the low temperature silicidation metal and its overlying ...	01/29/2002
6326251	Method of making salicidation of source and drain regions with metal gate MOSFET A method of forming a transistor includes forming a source/drain implant in the initial processing stages just after the formation of the isolation and active regions on the substrate. A uniform nitride layer is formed over the surface of the substrate on...	12/04/2001
6300201	Method to form a high K dielectric gate insulator layer, a metal gate structure, and self-aligned channel regions, post source/drain formation A process of fabricating a sub-micron MOSFET device, featuring a high dielectric constant gate insulator layer, and a metal gate structure, has been developed. Processes performed at temperatures detrimental to the high dielectric, gate insulator layer, s...	10/09/2001
6300177	Method to form transistors with multiple threshold voltages (VT) using a combination of different work function gate materials A method of forming a gate electrode, comprising the following steps. A semiconductor substrate having an overlying patterned layer exposing a portion of the substrate within active area and patterned layer opening. The patterned layer having exposed side...	10/09/2001
6294820	Metallic oxide gate electrode stack having a metallic gate dielectric metallic gate electrode and a metallic arc layer A method for forming a tantalum-based anti-reflective coating (ARC) layer begins by forming an MOS metallic gate electrode layer (20) over a substrate (20). The MOS metallic gate electrode layer (20) is covered with an ARC layer (22). The ARC layer is pre...	09/25/2001
6291282	Method of forming dual metal gate structures or CMOS devices An embodiment of the instant invention is a method of forming a first transistor having a first gate electrode and a second transistor having a second gate electrode on a semiconductor substrate, the method comprising the steps of: forming a conductive ma...	09/18/2001
6271573	Semiconductor device with gate structure and method of manufacturing the same Variations in threshold voltage among MOS devices are prevented by forming a metal gate electrode having an average grain size of 30 nm or less on a gate insulating film....	08/07/2001
6261887	Transistors with independently formed gate structures and method Transistors may be fabricated by isolating a first region (16) of a semiconductor layer from a second region (18) of the semiconductor layer (12). A first disposable gate structure (26) of the first transistor may be formed over the first region (16) of t...	07/17/2001
6222240	Salicide and gate dielectric formed from a single layer of refractory metal An integrated circuit fabrication process is provided for forming a metal oxide gate dielectric and salicide structures from a unitary layer of refractory metal. The refractory metal layer is placed upon a silicon-based substrate before the formation of t...	04/24/2001
6197642	Method for manufacturing gate terminal A method for manufacturing a gate terminal comprising the steps of providing a substrate, then forming and patterning an oxide layer to form a gate region. Next, a gate oxide layer and a crystalline silicon layer are formed in the gate region. This is fol...	03/06/2001
6194768	High dielectric constant gate dielectric with an overlying tantalum gate conductor formed on a sidewall surface of a sacrificial structure A transistor is provided having a gate conductor produced with ultra fine geometries. The gate conductor is metallic and is sized using deposition rather than photolithography. The deposition process can be closely controlled to achieve gate lengths less ...	02/27/2001
6171915	Method of fabricating a MOS-type transistor To provide a method of fabricating a MOS-type transistor of a LDD structure with a gate electrode made of molybdenum, which brings about a reduction in the amount of overlapping between the gate electrode and source/drain, a gate electrode is made of moly...	01/09/2001
6147380	Floating gate non-volatile memory cell with low erasing voltage and having different potential barriers A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer ...	11/14/2000
6140190	Method and structure for elevated source/drain with polished gate electrode insulated gate field effect transistors A method and structure are provided for an IGFET which has elevated source/drain regions and polished gate electrode. The IGFET provides raised doped polysilicon regions between the source/drain areas and subsequent metallization layers. The doped polysil...	10/31/2000
6080646	Method of fabricating a metal-oxide-semiconductor transistor with a metal gate A method of fabricating a MOS transistor having an aluminum gate is disclosed. On a MOS transistor having a polysilicon gate, an insulating layer is first formed. The device surface is then polished by CMP to expose the polysilicon gate. Then, an aluminum...	06/27/2000
6054355	Method of manufacturing a semiconductor device which includes forming a dummy gate A method of manufacturing a semiconductor device comprises the steps of forming a first film and a second film on a semiconductor substrate, selectively removing the second film, the first film and a top portion of the semiconductor substrate to form a fi...	04/25/2000

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Class 257/E29.158 - Elemental metal gate conductor material (e.g., W, Mo) (EPO)