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| Number | Title | Issue Date |
| 7388290 | Spacer patterned, high dielectric constant capacitor and methods for fabricating the same A high dielectric constant memory cell capacitor and method for producing the same, wherein the memory cell capacitor utilizes relatively large surface area conductive structures of thin spacer width pillars or having edges without sharp corners that lead to electri... | 06/17/2008 |
| 7154178 | Multilayer diffusion barrier for copper interconnections It is a general object of the present invention to provide an improved method of fabrication in the formation of an improved copper metal diffusion barrier layer having the structure, W/WSiN/WN, in single and dual damascene interconnect trench/contact via processing... | 12/26/2006 |
| 6703303 | Method of manufacturing a portion of a memory Metal nitride and metal oxynitride extrusions often form on metal suicides. These extrusions can cause short circuits and degrade processing yields. The present invention discloses a method of selectively removing such extrusions. In one embodiment, a nov... | 03/09/2004 |
| 6693354 | Semiconductor structure with substantially etched nitride defects protruding therefrom Metal nitride and metal oxynitride extrusions often form on metal silicides. These extrusions can cause short circuits and degrade processing yields. The present invention discloses a method of selectively removing such extrusions. In one embodiment, a no... | 02/17/2004 |
| 6693313 | Field effect transistors, field effect transistor assemblies, and integrated circuitry The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a... | 02/17/2004 |
| 6686275 | Method of selectively removing metal nitride or metal oxynitride extrusions from a semmiconductor structure Metal nitride and metal oxynitride extrusions often form on metal silicides. These extrusions can cause short circuits and degrade processing yields. The present invention discloses a method of selectively removing such extrusions. In one embodiment, a no... | 02/03/2004 |
| 6664592 | Semiconductor device with groove type channel structure A semiconductor device includes a semiconductor substrate, a gate insulator film formed on a bottom surface and a side surface of a groove formed in the semiconductor substrate, a gate electrode having a lower portion buried in the groove on whose bottom ... | 12/16/2003 |
| 6656799 | Method for producing FET with source/drain region occupies a reduced area A semiconductor device having a device separation region and an active region includes a gate oxide film, a source/drain region, and an electrode which is electrically coupled to the source/drain region. The active region is in contact with the gate oxide... | 12/02/2003 |
| 6645821 | Method of producing a thin film resistor in an integrated circuit A thin film resistor (60) is contained between two metal interconnect layers (40, 100) of an integrated circuit. Contact may be made to the resistor (60) through vias (95) from the metal layer (100) above the resistor (60) to both the thin film resistor (... | 11/11/2003 |
| 6642590 | Metal gate with PVD amorphous silicon layer and barrier layer for CMOS devices and method of making with a replacement gate process A semiconductor structure and method for making the same provides a metal gate on a silicon substrate. The gate includes a high dielectric constant on the substrate, and a physical vapor deposited (PVD) layer of amorphous silicon on the high k gate dielec... | 11/04/2003 |
| 6635939 | Boron incorporated diffusion barrier material A diffusion barrier layer comprising TiNx By is disclosed for protection of gate oxide layers in integrated transistors. The diffusion barrier layer can be fabricated by first forming a TiN layer and then incorporating boron into the... | 10/21/2003 |
| 6630391 | Boron incorporated diffusion barrier material A diffusion barrier layer comprising TiNx By is disclosed for protection of gate oxide layers in integrated transistors. The diffusion barrier layer can be fabricated by first forming a TiN layer and then incorporating boron into the... | 10/07/2003 |
| 6627558 | Apparatus and method for selectively restricting process fluid flow in semiconductor processing A semiconductor processing apparatus (10) is disclosed which includes a process chamber (12) and at least one substrate support (18) disposed within the process chamber (12) operable to support a substrate wafer (20). The semiconductor processing apparatu... | 09/30/2003 |
| 6627525 | Method for preventing polycide gate spiking A method for preventing polycide gate spiking, which essentially comprises the following steps: forms an oxide layer on a substrate; forming a polysilicon layer on the oxide layer; sputtering a barrier layer on the polysilicon layer; performing a first ra... | 09/30/2003 |
| 6615391 | Current controlled multi-state parallel test for semiconductor device A semiconductor memory device (300) having a parallel test circuit is disclosed. A test data path (308) receives parallel I/O line (I/O0-I/O7) values, and generates therefrom test result data values (PASS and DATA_TST). The test result data values (PASS a... | 09/02/2003 |
| 6614082 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6614064 | Transistor having a gate stick comprised of a metal, and a method of making same The present invention is generally directed to a transistor having a gate stack comprised of a metal, and a method of making same. In one illustrative embodiment, the transistor is comprised of a gate stack comprised of a gate insulation layer positioned ... | 09/02/2003 |
| 6613654 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6611032 | Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures The invention encompasses stacked semiconductor devices including gate stacks, wordlines, PROMs, conductive interconnecting lines, and methods for forming such structures. The invention also includes a method of forming a transistor gate comprising: a) fo... | 08/26/2003 |
| 6599821 | Method for fabricating conductive line pattern for semiconductor device A method for fabricating a conductive line pattern for a semiconductor device including the steps of: forming a gate insulation film on the upper surface of a semiconductor substrate; forming a polysilicon layer on the upper surface of the gate insulation... | 07/29/2003 |
| 6596595 | Forming a conductive structure in a semiconductor device A conductive structure for use in a semiconductor device includes a multilayer structure. A first layer includes a material containing silicon, e.g., polysilicon and silicon germanide. A barrier layer is formed over the first layer, with the barrier layer... | 07/22/2003 |
| 6592777 | Manufacture and cleaning of a semiconductor Metal nitride and metal oxynitride extrusions often form on metal silicides. These extrusions can cause short circuits and degrade processing yields. The present invention discloses a method of selectively removing such extrusions. In one embodiment, a no... | 07/15/2003 |
| 6586345 | Method of manufacturing a semiconductor device wiring layer having an oxide layer between the polysilicon and silicide layers In forming a conduction film in a semiconductor device, after an uneven natural oxide film on a silicon film has been once removed, an even and clean silicon oxide film is formed by an oxidizing chemical solution treatment. After that, a silicide film is ... | 07/01/2003 |
| 6566209 | Method to form shallow junction transistors while eliminating shorts due to junction spiking A method of forming shallow junction MOSFETs is achieved. A gate oxide layer is formed overlying a substrate. A first electrode layer, of polysilicon or metal, is deposited. A silicon nitride layer is deposited. The silicon nitride layer and the first ele... | 05/20/2003 |
| 6566211 | Surface modified interconnects An interconnect structure having refractory sidewalls 240 for enhanced yield, performance and reliability. The primary purpose of the refractory metal 240 is to getter sidewall impurities, residual polymers, and corrosive species by-products from the plas... | 05/20/2003 |
| 6562730 | Barrier in gate stack for improved gate dielectric integrity A barrier layer comprising silicon mixed with an impurity is disclosed for protection of gate dielectrics in integrated transistors. In particular, the barrier layer comprises silicon incorporating nitrogen. The nitrogen can be incorporated into an upper ... | 05/13/2003 |
| 6544876 | Titanium boride gate electrode and interconnect and methods regarding same A method for use in the fabrication of a gate electrode includes providing a gate oxide layer and forming a titanium boride layer on the oxide layer. An insulator cap layer is formed on the titanium boride layer and thereafter, the gate electrode is forme... | 04/08/2003 |
| 6545356 | Graded layer for use in semiconductor circuits and method for making same Methods of forming a graded layer is disclosed. The graded layer transitions from one material to another material. The properties of these materials are chosen to optimize the interfaces on each side of the graded layer. Specifically, an improved transis... | 04/08/2003 |
| 6541830 | Titanium boride gate electrode and interconnect A method for use in the fabrication of a gate electrode includes providing a gate oxide layer and forming a titanium boride layer on the oxide layer. An insulator cap layer is formed on the titanium boride layer and thereafter, the gate electrode is forme... | 04/01/2003 |
| 6531750 | Shallow junction transistors which eliminating shorts due to junction spiking A method of forming shallow junction MOSFETs is achieved. A gate oxide layer is formed overlying a substrate. A first electrode layer, of polysilicon or metal, is deposited. A silicon nitride layer is deposited. The silicon nitride layer and the first ele... | 03/11/2003 |
| 6525384 | Conductor layer nitridation Methods and apparatus for forming word line stacks comprise forming a thin nitride layer coupled between a bottom silicon layer and a conductor layer. In a further embodiment, a diffusion barrier layer is coupled between the thin nitride layer and the bot... | 02/25/2003 |
| 6515340 | Semiconductor device A semiconductor device having a device separation region and an active region includes a gate oxide film, a source/drain region, and an electrode which is electrically coupled to the source/drain region. The active region is in contact with the gate oxide... | 02/04/2003 |
| 6511900 | Boron incorporated diffusion barrier material A diffusion barrier layer comprising TiNx By is disclosed for protection of gate oxide layers in integrated transistors. The diffusion barrier layer can be fabricated by first forming a TiN layer and then incorporating boron into the... | 01/28/2003 |
| 6506647 | Method for fabricating a semiconductor integrated circuit device A method for fabricating a semiconductor integrated circuit device including a memory cell of a MISFET and a capacitor element formed in a memory cell-forming region of a semiconductor substrate, and an n channel-type MISFET and a p channel-type MISFET in... | 01/14/2003 |
| 6504210 | Fully encapsulated damascene gates for Gigabit DRAMs A fully polysilicon encapsulated metal-containing damascene gate structure is provided that is useful in Gigabit DRAM (dynamic random access memory) device. The fully encapsulated metal-containing damascene gate comprises a semiconductor substrate having ... | 01/07/2003 |
| 6498378 | Methods of forming field effect transistors and integrated circuitry The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a... | 12/24/2002 |
| 6492217 | Complementary metal gates and a process for implementation A transistor device includes a gate dielectric overlying a substrate, a barrier layer overlying the gate dielectric, and a gate electrode overlying the barrier layer. The barrier layer of the device has a physical property that inhibits interaction betwee... | 12/10/2002 |
| 6486030 | Methods of forming field effect transistors and integrated circuitry including TiN gate element The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a... | 11/26/2002 |
| 6479357 | Method for fabricating semiconductor device with copper gate electrode A method for fabricating a semiconductor device including the steps of: forming a gate insulation film on the upper surface of a semiconductor substrate; forming a dummy layer pattern on the upper surface of the gate insulation film; forming an insulating... | 11/12/2002 |
| 6479362 | Semiconductor device with high-temperature-stable gate electrode for sub-micron applications and fabrication thereof An improved gate electrode provides greater tolerances to higher temperature annealing treatments, and is useful in connection with the formation of self-aligned contacts as are needed for high density embedded DRAM applications. Consistent with one embod... | 11/12/2002 |
