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| Number | Title | Issue Date |
| 7436071 | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such an integrated type semiconductor device comprises a first semiconduct... | 10/14/2008 |
| 7432599 | Memory module having interconnected and stacked integrated circuits A multi-chip memory module may be formed including two or more stacked integrated circuits mounted to a substrate or lead frame structure. The memory module may include means to couple one or more of the stacked integrated circuits to edge conductors in a memory car... | 10/07/2008 |
| 7425485 | Method for forming microelectronic assembly A microelectronic assembly and a method for forming the same are provided. The method includes forming first and second lateral etch stop walls in a semiconductor substrate having first and second opposing surfaces. An inductor is formed on the first surface of the ... | 09/16/2008 |
| 7417293 | Image sensor packaging structure An image sensor module includes a first substrate, a second substrate provided over the first substrate, an image sensor device for receiving an image signal flip-chip bonded to the second substrate, and a semiconductor device for processing the image signal from th... | 08/26/2008 |
| 7413928 | Die-wafer package and method of fabricating same A die-wafer package includes a singulated semiconductor die having a first plurality of bond pads on a first surface and a second plurality of bond pads on a second opposing surface thereof. Each of the first and second pluralities of bond pads includes an under-bum... | 08/19/2008 |
| 7378331 | Methods of vertically stacking wafers using porous silicon A method and article to provide a three-dimensional (3-D) IC wafer process flow. In some embodiments, the method and article include bonding a device layer of a multilayer wafer to a device layer of another multilayer wafer to form a bonded pair of device layers, ea... | 05/27/2008 |
| 7335533 | Methods for assembling semiconductor devices in superimposed relation with adhesive material defining the distance adjacent semiconductor devices are spaced apart from one another A method for assembling semiconductor devices includes providing a first semiconductor device, applying a predetermined volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device adjacent to the... | 02/26/2008 |
| 7332372 | Methods for forming assemblies and packages that include stacked semiconductor devices separated a distance defined by adhesive material interposed therebetween A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor ... | 02/19/2008 |
| 7327038 | Semiconductor device package Provided is a semiconductor device package in which instability of a bonding wire that may occur when a plurality of semiconductor chips are stacked is prevented and which obtains a light, thin and small structure. The semiconductor device package includes a substra... | 02/05/2008 |
| 7291927 | Dual chips stacked packaging structure A dual chips stacked packaging structure. A first chip comprises an active surface and an opposing non-active surface, the active surface consisting of a central area and a peripheral area having a plurality of first bonding pads. A lead frame comprises a plurality ... | 11/06/2007 |
| 7288835 | Integrated circuit package-in-package system An integrated circuit package-in-package system is provided forming a first integrated circuit package having a first interface, stacking a second integrated circuit package having a second interface above the first integrated circuit package, fitting the first inte... | 10/30/2007 |
| 7285864 | Stack MCP A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semic... | 10/23/2007 |
| 7276424 | Fabrication of aligned nanowire lattices Methodologies associated with fabricating aligned nanowire lattices are described. One exemplary method embodiment includes providing a twist wafer bonded thin single crystal semiconductor film and a bulk single crystal substrate of the same material. Periodic non-u... | 10/02/2007 |
| 7239020 | Multi-mode integrated circuit structure A multi-mode integrated circuit structure. In one embodiment, an integrated circuit structure includes a first die having at least one first component disposed on a face, the first die fabricated using a first process that is optimal for operating the component in a... | 07/03/2007 |
| 7196425 | Copper interposer for reducing warping of integrated circuit packages and method of making IC packages A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interpo... | 03/27/2007 |
| 7119445 | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such an integrated type semiconductor device comprises a first semiconduct... | 10/10/2006 |
| 7091621 | Crack resistant scribe line monitor structure and method for making the same A method and structure prevents crack propagation to the active die circuitry of a main die area during sawing around the outer periphery of the main die area. Stress relief elements, such as dummy vias, are provided in the scribe line area between the saw lane and ... | 08/15/2006 |
| 5757000 | Reduced stress focal plane array for thermal imaging system and method A focal plane array (30) for a thermal imaging system (20). The focal plane array (30) may include a number of thermal sensitive elements (42) formed by a first series of slots (78) and a second series of slots (80). The thermal sensors (40) may be bounde... | 05/26/1998 |
| 5470761 | Process for fabricating a front surface resonant mesh array detector A process for fabricating a front surface resonant mesh array detector produces a detector of reduced size. The reduced size results in enhanced responsivity, and minimizes thermal stress between the detector and typical array substrates, enabling fabrica... | 11/28/1995 |
| 5367167 | Uncooled infrared detector and method for forming the same A bolometer for detecting radiation in a spectral range is described herein. The bolometer includes an integrated circuit substrate 122 and a pixel body 120 spaced from the substrate 122 by at least one pillar 124. The pixel body 120 comprises an absorber... | 11/22/1994 |
| 5332899 | System for converting an infrared image into a visible or near infrared image A system for the conversion of an infrared image into a visible or near infrared image includes optical input and output devices, an infrared detector on which is formed an infrared image of a scene, a circuit for reading the signal supplied by the detect... | 07/26/1994 |
| 5318666 | Method for via formation and type conversion in group II and group VI materials A method of forming an n-p junction in a body (44, 44a, 44b) formed of Group II and Group VI elements. The body (44, 44a, 44b) initially is of p-type conductivity characteristic, and a dry reactive etching process is employed for forming a via (60, 60a, 6... | 06/07/1994 |
| 5315147 | Monolithic focal plane array An integrated circuit wafer is formed as a monolithic focal plane array having signal processing circuitry formed upon a first surface thereof and infrared detector elements formed upon a second surface thereof. A process for forming the same is also disc... | 05/24/1994 |
| 5288649 | Method for forming uncooled infrared detector A bolometer for detecting radiation in a spectral range is described herein. The bolometer includes an integrated circuit substrate 122 and a pixel body 120 spaced from the substrate 122 by at least one pillar 124. The pixel body 120 comprises an absorber... | 02/22/1994 |
| 5196703 | Readout system and process for IR detector arrays A method of detecting the intensity of radiation emanating from an object 116 relative to a background level at a pixel detector 120 is disclosed herein. A resistive element 122 with a resistance dependent upon the intensity of radiation impinging the det... | 03/23/1993 |
| 5092036 | Ultra-tall indium or alloy bump array for IR detector hybrids and micro-electronics Method for improving particular interconnect pads for microcircuitry so that they provide more compliant interconnections between opposed pairs of contacts of the microchips in a hybrid detector array assembly. The individual tubes of prior art interconne... | 03/03/1992 |
| 5021663 | Infrared detector Preferred embodiments include a monolithic uncooled infrared detector array of bolometers fabricated over a silicon substrate (142); the bolometers include a stack (144) of oxide (146) TiN (148), a-Si:H (150), TiN (152), oxide (154) with the TiN forming t... | 06/04/1991 |
| 4943491 | Structure for improving interconnect reliability of focal plane arrays An improved structure for interconnecting focal plane arrays. A first body having a first coefficient of expansion comprising a detector array is connected by interconnection apparatus to a second body having a second coefficient of expansion. The second ... | 07/24/1990 |
| 4871921 | Detector array assembly having bonding means joining first and second surfaces except where detectors are disposed Method and apparatus for providing an improved detector array assembly in which the detectors are electrically connected from one substrate to another through adjoining "bump" connections but are prevented from distortion when an epoxy joining the two sub... | 10/03/1989 |
