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| Number | Title | Issue Date |
| 7443037 | Stacked integrated circuit package system with connection protection A stacked integrated circuit package system is provided connecting an interconnect between a first integrated circuit device and a substrate, the first integrated circuit device on the substrate, applying a protective dot on the first integrated circuit device, moun... | 10/28/2008 |
| 7436071 | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such an integrated type semiconductor device comprises a first semiconduct... | 10/14/2008 |
| 7432599 | Memory module having interconnected and stacked integrated circuits A multi-chip memory module may be formed including two or more stacked integrated circuits mounted to a substrate or lead frame structure. The memory module may include means to couple one or more of the stacked integrated circuits to edge conductors in a memory car... | 10/07/2008 |
| 7413928 | Die-wafer package and method of fabricating same A die-wafer package includes a singulated semiconductor die having a first plurality of bond pads on a first surface and a second plurality of bond pads on a second opposing surface thereof. Each of the first and second pluralities of bond pads includes an under-bum... | 08/19/2008 |
| 7399686 | Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate A semiconductor processing method includes providing a substrate, forming a plurality of semiconductor layers in the substrate, each of the semiconductor layers being distinct and selected from different groups of semiconductor element types, the semiconductor layer... | 07/15/2008 |
| 7378331 | Methods of vertically stacking wafers using porous silicon A method and article to provide a three-dimensional (3-D) IC wafer process flow. In some embodiments, the method and article include bonding a device layer of a multilayer wafer to a device layer of another multilayer wafer to form a bonded pair of device layers, ea... | 05/27/2008 |
| 7358117 | Stacked die in die BGA package Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided. ... | 04/15/2008 |
| 7335533 | Methods for assembling semiconductor devices in superimposed relation with adhesive material defining the distance adjacent semiconductor devices are spaced apart from one another A method for assembling semiconductor devices includes providing a first semiconductor device, applying a predetermined volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device adjacent to the... | 02/26/2008 |
| 7332372 | Methods for forming assemblies and packages that include stacked semiconductor devices separated a distance defined by adhesive material interposed therebetween A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor ... | 02/19/2008 |
| 7327038 | Semiconductor device package Provided is a semiconductor device package in which instability of a bonding wire that may occur when a plurality of semiconductor chips are stacked is prevented and which obtains a light, thin and small structure. The semiconductor device package includes a substra... | 02/05/2008 |
| 7321163 | Semiconductor device including a plurality of circuit element chips and a manufacturing method thereof A semiconductor device includes a first circuit element chip including a first surface on which a plurality of first electrodes are arranged, and a second circuit element chip including a first surface on which a plurality of second electrodes are arranged. The seco... | 01/22/2008 |
| 7317256 | Electronic packaging including die with through silicon via An apparatus, method, and system for electronic device packaging having stacked dice are disclosed herein. A first die has a through silicon via formed therethrough. A second die is landed on the through silicon via of the first die. A mount having a lead is coupled... | 01/08/2008 |
| 7291927 | Dual chips stacked packaging structure A dual chips stacked packaging structure. A first chip comprises an active surface and an opposing non-active surface, the active surface consisting of a central area and a peripheral area having a plurality of first bonding pads. A lead frame comprises a plurality ... | 11/06/2007 |
| 7288835 | Integrated circuit package-in-package system An integrated circuit package-in-package system is provided forming a first integrated circuit package having a first interface, stacking a second integrated circuit package having a second interface above the first integrated circuit package, fitting the first inte... | 10/30/2007 |
| 7285864 | Stack MCP A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semic... | 10/23/2007 |
| 7276424 | Fabrication of aligned nanowire lattices Methodologies associated with fabricating aligned nanowire lattices are described. One exemplary method embodiment includes providing a twist wafer bonded thin single crystal semiconductor film and a bulk single crystal substrate of the same material. Periodic non-u... | 10/02/2007 |
| 7226814 | Semiconductor package device and method for fabricating the same Disclosed are a semiconductor package device and a method for fabricating the semiconductor package device. The semiconductor package has a semiconductor chip including a plurality of bonding pads having a microscopic size and aligned at a minute interval, a planar ... | 06/05/2007 |
| 7220618 | Method for forming a redistribution layer in a wafer structure The present invention relates to a method for forming a redistribution layer in a wafer structure. The method comprises: (a) providing a wafer having a plurality of conductive structures and a first passivation layer thereon, wherein the first passivation layer cove... | 05/22/2007 |
| 7214582 | Semiconductor substrate and semiconductor circuit formed therein and fabrication methods A semiconductor substrate and a semiconductor circuit formed therein and associated fabrication methods are provided. A multiplicity of depressions with a respective dielectric layer and a capacitor electrode are formed for realizing buried capacitors in a carrier s... | 05/08/2007 |
| 7196425 | Copper interposer for reducing warping of integrated circuit packages and method of making IC packages A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interpo... | 03/27/2007 |
| 7148081 | Method of manufacturing a semiconductor device In a semiconductor device in which a plurality of semiconductor chips are stacked on a mounting substrate, an adhesive material formed of resin mainly having a thermosetting property is applied to a semiconductor chip mounting region on the mounting substrate. After... | 12/12/2006 |
| 7119445 | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such an integrated type semiconductor device comprises a first semiconduct... | 10/10/2006 |
| 7091621 | Crack resistant scribe line monitor structure and method for making the same A method and structure prevents crack propagation to the active die circuitry of a main die area during sawing around the outer periphery of the main die area. Stress relief elements, such as dummy vias, are provided in the scribe line area between the saw lane and ... | 08/15/2006 |
| 6657194 | Multispectral monolithic infrared focal plane array detectors At a face of a silicon semiconductor substrate tilted about one degree from a [100] orientation, a readout integrated circuit (ROIC) is implemented, specially designed and fabricated for direct epitaxial growth. Layers of II-VI semiconductor material, pre... | 12/02/2003 |
| 6359290 | Self-aligned bump bond infrared focal plane array architecture A method of making a diode and the diode wherein there is provided a substrate of p-type group II-VI semiconductor material and an electrically conductive material capable of forming an ohmic contact with the substrate is forced into the lattice of the su... | 03/19/2002 |
| 6323475 | Hybrid semiconductor imaging device having plural readout substrates An imaging device includes one detector substrate with a plurality of readout substrates connected thereto. The detector substrate has a bias contact on a first surface and a number of detector cell contacts on a second surface. The readout substrate incl... | 11/27/2001 |
| 6281039 | Hybrid device and a method of producing electrically active components by an assembly operation The invention relates to a method of assembling first and second electronic components (2, 4), the first of the components being fitted with conductive connection contacts (42), the method comprising a step of assembling the two components, the creation of at ... | 08/28/2001 |
| 6245591 | High MTF optical coating for hybrid UFPA's An optical coating for an uncooled focal plane array detector where the optical coating comprises a porous film. The porous film preferably comprises a xerogel.... | 06/12/2001 |
| 6188070 | Photonic radiation sensor of large dimensions A two-dimensional photonic radiation detector based on a technique of hybridizing a detection chip onto a read chip through a micro-balls network making the electrical and mechanical inter-connection between two chips, the detection chip being composed of... | 02/13/2001 |
| 6157404 | Imaging system including an array of dual-band microbridge detectors A dual-band detector that absorbs incident radiation in a first range of wavelengths and that absorbs incident radiation in a second range of wavelengths. The dual-band detector includes a semiconductor substrate and a first microbridge detector level dis... | 12/05/2000 |
| 6157020 | Bispectral electromagnetic wave detector The disclosure relates to a bispectral electromagnetic wave detector including at least one first and one second overlaid plane active detector elements separated by a common layer, said first and second detector elements being sensitive to the different ... | 12/05/2000 |
| 6104046 | Dual-band infrared sensing material array and focal plane array A dual color focal plane array includes a sensing material array (SMA) backed by a readout multiplexer unit (RMU). The SMA includes two interleaved sets of pixels. Each pixel of the first set, sensitive only in a primary band, includes a QWIP backed by a ... | 08/15/2000 |
| 6091126 | Electromagnetic wave detector An electromagnetic wave detector having a first detector element including an active photoconducting material capable of detecting a band of wavelength and a second detector element including an active photoconducting material capable of detecting the sam... | 07/18/2000 |
| 6083557 | System and method for making a conductive polymer coating This is a system and method of forming a conductive polymer optical coating on an infrared detection system. The apparatus may include an upper vacuum chamber, a shutter assembly mounted inside the upper vacuum chamber, a substrate holder disposed inside ... | 07/04/2000 |
| 6080987 | Infrared-sensitive conductive-polymer coating This is a novel conductive-polymer optical coating for infrared detection and method of making the same. The system may comprise an integrated circuit substrate itself comprising a plurality of mesas and comprising via connections on an upper portion of e... | 06/27/2000 |
| 5998794 | Prevention of photoelectric conversion layer contamination in an imaging device A semiconductor imaging device comprising MOS or CMOS pixel circuits having pixel pads separated by insulating material and having a conductive migration blocking layer applied over the pixel pads. The conductive migration blocking layer comprises an elec... | 12/07/1999 |
| 5981950 | Multicolor photonic radiation detector A multicolor radiation detector capable of detecting at least two incident radiations with two distinct wave lengths λi1 and λs1 where wave length λs1 is greater than wave length λi1. The multicolor radiation detector includes two detection components... | 11/09/1999 |
| 5914488 | Infrared detector An infrared transmission window 4 is placed on the front of a light reception part 2 formed on a substrate 1 with a cavity 3 between and is bonded to the substrate 1 in airtight relation on a bond face in the range surrounding the light reception part 2, ... | 06/22/1999 |
| 5900630 | Radiation detection apparatus An infrared energy detection apparatus having a first array of infrared detectors adapted to detect infrared energy of a first wavelength and produce an electrical signal corresponding to such detected energy, and a second array of infrared detectors, pos... | 05/04/1999 |
| 5869851 | Photoelectric conversion device with graded band gap and carrier concentration A photoelectric conversion device wherein, in order to realize a photoelectric conversion device with high multiplication factors and excellent response speeds even under the application of low voltage by eliminating spike and notch in the hetero junction... | 02/09/1999 |
