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An armor with rollers is provided that enables a user to move in all positions by rolling on a hard and smooth surface while constantly varying his bearing points on the ground.
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| Number | Title | Issue Date |
| 7436013 | Ferroelectric memory device A ferroelectric memory device has a high performance, includes no Pb, and can be directly mounted onto an Si substrate. The ferroelectric memory device includes a (001)-oriented BiFeO3 ferroelectric layer 5 with a tetragonal structure, which is for... | 10/14/2008 |
| 7410812 | Manufacture of semiconductor device having insulation film of high dielectric constant A method contains the steps of (a) heating a silicon substrate in a reaction chamber; and (b) supplying film-forming gas containing source gas, nitridizing gas, and nitridation enhancing gas to a surface of the heated silicon substrate, to deposit on the silicon sub... | 08/12/2008 |
| 7408213 | Ferroelectric memory device and method of manufacture of same A ferroelectric memory device has a lower insulating film formed on a semiconductor substrate. A ferroelectric capacitor structure is formed on the lower insulating film. The ferroelectric capacitor structure is created by layering in order a lower electrode, ferroe... | 08/05/2008 |
| 7396750 | Method and structure for contacting two adjacent GMR memory bit A method and a structure are provided for improving the contact of two adjacent GMR memory bits. Two adjacent bit ends are connected by utilizing a single via. ... | 07/08/2008 |
| 7394090 | Non-volatile memory and the fabrication method A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected t... | 07/01/2008 |
| 7382013 | Dielectric thin film, dielectric thin film device, and method of production thereof To provide a dielectric thin with a high dielectric constant, a low leakage current, and stable physical properties and electrical properties and to provide a thin film capacitor or other thin film dielectric device with a high capacitance and high reliability and a... | 06/03/2008 |
| 7374952 | Methods of patterning a magnetic stack of a magnetic memory cell and structures thereof Methods of patterning a magnetic stack of a magnetic memory cell and structures thereof. At least the top magnetic material layer of a magnetic stack is patterned using a hard mask, and a conformal insulating material is deposited over the patterned top magnetic mat... | 05/20/2008 |
| 7368774 | Capacitor and its manufacturing method, ferroelectric memory device, actuator, and liquid jetting head A capacitor includes a lower electrode, a first dielectric film composed of lead zirconate titanate niobate formed above the lower electrode, a second dielectric film composed of lead zirconate titanate or lead zirconate titanate niobate with a Nb composition smalle... | 05/06/2008 |
| 7368298 | Method of manufacturing ferroelectric semiconductor device An Ir film, an IrOx film, a Pt film, a PtO film and a Pt film are formed, and thereafter a PLZT film is formed. Then, heat treatment at 600° C. or lower is performed by the RTA method in an atmosphere containing Ar and O2 to thereby crystalliz... | 05/06/2008 |
| 7352060 | Multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring substrate A multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring structure is disclosed. The multilayer wiring substrate includes a dielectric layer including a resin material mixed with an inorganic filler, wherein the inorganic filler i... | 04/01/2008 |
| 7348616 | Ferroelectric integrated circuit devices having an oxygen penetration path Ferroelectric integrated circuit devices, such as memory devices, are formed on an integrated circuit substrate. Ferroelectric capacitor(s) are on the integrated circuit substrate and a further structure on the integrated circuit substrate overlies at least a part o... | 03/25/2008 |
| 7323349 | Self-aligned cross point resistor memory array A method of fabricating resistor memory array includes preparing a silicon substrate; depositing a bottom electrode, a sacrificial layer, and a hard mask layer on a substrate P+ layer; masking, patterning and etching to remove, in a first direction, a portion of the... | 01/29/2008 |
| 7312488 | Semiconductor storage device and manufacturing method for the same There is provided a semiconductor storage device comprising a ferroelectric capacitor superior in barrier capability against penetration of hydrogen from all directions including a transverse direction. The device comprises a transistor formed on a semiconductor sub... | 12/25/2007 |
| 7309617 | MRAM memory cell with a reference layer and method for fabricating The invention relates to a method for fabricating a reference layer for MRAM memory cells and an MRAM memory cell equipped with a reference layer of this type. A reference layer of this type comprises two magnetically coupled layers having a different Curie temperat... | 12/18/2007 |
| 7307338 | Three dimensional polymer memory cell systems Systems and methodologies are provided for forming three dimensional memory structures that are fabricated from blocks of individual polymer memory cells stacked on top of each other. Such a polymer memory structure can be formed on top of control component circuitr... | 12/11/2007 |
| 7304339 | Passivation structure for ferroelectric thin-film devices Ferroelectric thin film devices including a passivation structure to reduce or control a leakage path between two electrodes and along an interface between a ferroelectric thin film layer and a passivation layer are described. Methods for fabricating such devices ar... | 12/04/2007 |
| 7291530 | Semiconductor storage device and method of manufacturing the same A method of manufacturing a semiconductor storage device having a capacitive element having a dielectric layer having a perovskite-type crystal structure represented by general formula ABO3 and a lower electrode and an upper electrode disposed so as to sa... | 11/06/2007 |
| 7271011 | Methods of implementing magnetic tunnel junction current sensors Techniques are provided for sensing a first current produced by an active circuit component. According to these techniques, a current sensor is disposed over the active circuit component. The current sensor includes a Magnetic Tunnel Junction (“MTJ”) core dispos... | 09/18/2007 |
| 7265403 | Semiconductor device A semiconductor device is composed at least of a memory circuit part having capacitors and a peripheral circuit part for controlling the memory circuit part and has a first hydrogen barrier film of hydrogen resistance covering a region in which the capacitors are fo... | 09/04/2007 |
| 7262065 | Ferroelectric memory and its manufacturing method A method for manufacturing a ferroelectric memory includes: (a) forming first and second contact sections on a first dielectric layer formed above a base substrate; (b) forming a laminated body having a lower electrode, a ferroelectric layer and an upper electrode s... | 08/28/2007 |
| 7253463 | Semiconductor memory device and method of manufacturing the same A semiconductor memory device includes a semi-conductor substrate, a MOS transistor formed on the semiconductor substrate and including a pair of impurity regions as a source and a drain, and a gate electrode, a first conductive plug formed in contact with an upper ... | 08/07/2007 |
| 7247939 | Metal filled semiconductor features with improved structural stability A method for forming a metal filled semiconductor feature with improved structural stability including a semiconductor wafer having an anisotropically etched opening formed through a plurality of dielectric insulating layers revealing a first etching resistant layer... | 07/24/2007 |
| 7239002 | Integrated circuit device In a temperature sensor section of a semiconductor integrated circuit device, first vias of tungsten are formed at the topmost layer of a multi-layer wiring layer and pads of titanium are provided on regions of the multi-layer wiring layer which covers the vias. An ... | 07/03/2007 |
| 7217576 | Method for manufacturing ferroelectric capacitor, method for manufacturing ferroelectric memory, ferroelectric capacitor and ferroelectric memory A method for manufacturing a ferroelectric capacitor in accordance with the present invention includes: (a) a step of forming a ferroelectric laminated body by successively laminating a lower electrode layer, a ferroelectric layer and an upper electrode layer over a... | 05/15/2007 |
| 7217969 | Flip FERAM cell and method to form same A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelect... | 05/15/2007 |
| 7214977 | Ferroelectric thin film, method of manufacturing the same, ferroelectric memory device and ferroelectric piezoelectric device A ferroelectric thin film formed of a highly oriented polycrystal in which 180° domains and 90° domains arrange at a constant angle to an applied electric field direction in a thin film plane and reversely rotate in a predetermined electric field. ... | 05/08/2007 |
| 7208786 | Memory device A memory device comprising a layer of piezoelectric material and a layer of ferroelectric material clamped together such that a voltage applied to one layer results in a voltage being generated across the other layer. The method of data storage and retrieval compris... | 04/24/2007 |
| 7193260 | Ferroelectric memory device A ferroelectric memory device includes a first bit line, a second bit line provided adjacent to the first bit line, a first memory cell block including a first terminal, a second terminal, and a plurality of memory cells connected in series between the first and sec... | 03/20/2007 |
| 7186573 | Flip FERAM cell and method to form same A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelect... | 03/06/2007 |
| 7176509 | Semiconductor device and method for manufacturing the same Two ferroelectric capacitors including a PZT film are connected to one MOS transistor. Electrodes of the ferroelectric capacitor are arranged above a main plane of a substrate parallel to the main plane. Therefore, high capacity can be obtained easily. Furthermore, ... | 02/13/2007 |
| 7148530 | Ferroelectric capacitor and method for manufacturing the same A ferroelectric capacitor and a method for manufacturing the same includes a lower electrode, a dielectric layer, and an upper electrode layer, which are sequentially stacked, wherein the dielectric layer has a multi-layer structure including a plurality of sequenti... | 12/12/2006 |
| 7148532 | Ferroelectric element and method of manufacturing ferroelectric element Additional elements of Ca, Sr, and Ir are added to a single layer lead lanthanum zirconate titanate (PLZT), thereby decreasing a c/a ratio to within a range from 1.00 to 1.008 smaller than a general c/a of a range from about 1.01 to 1.03 generally used in a lead lan... | 12/12/2006 |
| 7148531 | Magnetoresistive memory SOI cell A ferromagnetic thin-film based digital memory having a substrate formed of a base supporting an electrically insulating material primary substrate layer in turn supporting a plurality of current control devices each having an interconnection arrangement with each o... | 12/12/2006 |
| 7138674 | Semiconductor memory device A semiconductor memory device includes a cell block composed of several series-connected units having a ferroelectric capacitor and a cell transistor parallel-connected to the ferroelectric capacitor and a select transistor connected to an end of the cell block. Mut... | 11/21/2006 |
| 7122850 | Semiconductor device having local interconnection layer and etch stopper pattern for preventing leakage of current A semiconductor device having a local interconnection layer and a method for manufacturing the same are provided. A local interconnection layer is formed in an interlayer dielectric (ILD) layer on an isolation layer and a junction layer, for covering a semiconductor... | 10/17/2006 |
| 7109540 | Semiconductor device for restraining short circuiting and method of manufacturing thereof A method of manufacturing a semiconductor device is provided including: forming a groove in an insulation film; forming a lower electrode material film on the insulation film and in the groove; forming a ferroelectric material film on the lower electrode material fi... | 09/19/2006 |
| 7042037 | Semiconductor device Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the... | 05/09/2006 |
| 7042035 | Memory array with high temperature wiring A memory array with components that can withstand high temperature fabrication is provided. Some memory materials require high temperature process steps in order to achieve desired properties. During fabrication, a memory material is deposited on structures that may... | 05/09/2006 |
| 6930340 | Memory cell array including ferroelectric capacitors, method for making the same, and ferroelectric memory device A memory cell array is provided that includes ferroelectric capacitors with enhanced characteristics, a method of making the same, and a ferroelectric memory device including the memory cell. In a memory cell array, memory cells including ferroelectric capaci... | 08/16/2005 |
| 6917063 | Ferroelectric memory and method of fabricating the same A ferroelectric memory includes a substrate and a sheet-shaped device formed over the substrate through an adhesive layer. The sheet-shaped device includes a memory cell array in which a ferroelectric layer is disposed at least in intersecting regions of a plurality... | 07/12/2005 |
