Did You Know...
...that it was melting ice cream that inspired the invention of the outboard motor? It was a lovely August day and Ole Evinrude was rowing his boat to his favorite island picnic spot. As he rowed, he watched his ice cream melt and wished he had a faster way to get to the island. At that moment the idea for the outboard motor was born!
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| Number | Title | Issue Date |
| 7388274 | Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors Disclosed is a semiconductor structure that incorporates a capacitor for reducing the soft error rate of a device within the structure. The multi-layer semiconductor structure includes an insulator-filled deep trench isolation structure that is formed through an act... | 06/17/2008 |
| 7262452 | Method of forming DRAM device having capacitor and DRAM device so formed In a method of forming a DRAM device having a capacitor and a DRAM device so formed, an interlayer dielectric having at least one layer is formed on a semiconductor substrate. The interlayer dielectric layer and a predetermined portion of the semiconductor substrate... | 08/28/2007 |
| 7247905 | Offset vertical device The present invention includes a method for forming a memory array and the memory array produced therefrom. Specifically, the memory array includes at least one first-type memory device, each of the at least one first-type memory device comprising a first transistor... | 07/24/2007 |
| 7199416 | Systems and methods for a memory and/or selection element formed within a recess in a metal line The subject invention provides systems and methodologies for fabrication of memory and/or selection (e.g., diodes) elements in a recession in a semiconductor layer. In particular, a trench of varying width is created in the semiconductor layer by employing various e... | 04/03/2007 |
| 7129130 | Out of the box vertical transistor for eDRAM on SOI The present invention provides a vertical memory device formed in a silicon-on-insulator substrate, where a bitline contacting the upper surface of the silicon-on-insulator substrate is electrically connected to the vertical memory device through an upper strap diff... | 10/31/2006 |
| 6066869 | Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor A memory cell for a memory array in a folded bit line configuration. The memory cell includes an access transistor formed in a pillar of single crystal semiconductor material. The access transistor has first and second source/drain regions and a body regi... | 05/23/2000 |
| 5502320 | Dynamic random access memory (DRAM) semiconductor device A semiconductor device comprising a semiconductor substrate of first conductivity type, a trench type element isolation region formed in a preset depth from the semiconductor substrate surface, an element region of the first conductivity type surrounded b... | 03/26/1996 |
| 5164917 | Vertical one-transistor DRAM with enhanced capacitance and process for fabricating One embodiment of the present invention is a one transistor DRAM cell having enhanced capacitance and minimized soft error rate by providing an ungrounded cell capacitor plate which is insulated from the substrate. The structure includes a vertical transi... | 11/17/1992 |
| 5021355 | Method of fabricating cross-point lightly-doped drain-source trench transistor A structure and fabrication process for a self-aligned, lightly-doped drain/source n-channel field-effect transistor wherein a trench is formed in a well region in a wafer including an epitaxial layer on a substrate. A first, heavily doped drain region an... | 06/04/1991 |
| 4954854 | Cross-point lightly-doped drain-source trench transistor and fabrication process therefor A structure and fabrication process for a self-aligned, lightly-doped drain/source n-channel field-effect transistor wherein a trench is formed in a well region in a wafer including an epitaxial layer on a substrate. A first, heavily doped drain region an... | 09/04/1990 |
