Class 257/E27.094 - Having storage electrode extension stacked over the transistor (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
No. of patents: 64
Last issue date: 11/27/2007

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Number	Title	Issue Date
7301192	Dram cell pair and dram memory cell array Stack and trench memory cells are provided in a DRAM memory cell array. The stack and trench memory cells are arranged so as to form identical cell pairs each having a trench capacitor, a stack capacitor and a semiconductor fin, in which the active areas of two sele...	11/27/2007
7202127	Methods of forming a plurality of capacitors A plurality of capacitor electrode openings is formed within capacitor electrode-forming material. A first set of the openings is formed to a depth which is greater within the capacitor electrode-forming material than is a second set of the openings. Conductive firs...	04/10/2007
7180126	Multi-level memory cell array with lateral floating spacers An array of multi-level non-volatile memory transistors features a transistor construction with a conductive polysilicon control gate having opposed sidewalls insulatively spaced just above the substrate. Conductive polysilicon spacers are separated from the opposed...	02/20/2007
7126181	Capacitor constructions The invention includes methods of forming circuit devices. A metal-containing material comprising a thickness of no more than 20 Å (or alternatively comprising a thickness resulting from no more than 70 ALD cycles) is formed between conductively-doped silicon and ...	10/24/2006
6654295	Reduced topography DRAM cell fabricated using a modified logic process and method for operating same A memory system that includes a DRAM cell that includes an access transistor and a storage capacitor. The storage capacitor is fabricated by forming a polysilicon crown electrode, a dielectric layer overlying the polysilicon crown, and a polysilicon plate...	11/25/2003
6642098	DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same A memory system that includes a dynamic random access memory (DRAM) cell including an access transistor and a capacitor structure fabricated in a semiconductor substrate. The capacitor structure is fabricated by forming a cavity in a shallow trench isolat...	11/04/2003
6613690	Approach for forming a buried stack capacitor structure featuring reduced polysilicon stringers A process for forming a buried stack capacitor structure in a recessed region of a shallow trench isolation (STI) region, has been developed. The process features a unique sequence of procedures eliminating possible polysilicon stringers or residuals whic...	09/02/2003
6468887	Semiconductor device and a method of manufacturing the same In a semiconductor device of this invention, a pillar projection serving as a very thin active region is formed on the surface of a p-type silicon semiconductor substrate. A gate electrode 21 is formed to cover a central portion of the pillar projection. ...	10/22/2002
6399981	Integrated circuitry memory devices Methods of forming capacitors and related integrated circuitry are described. In a preferred embodiment, the capacitors form part of a dynamic random access memory (DRAM) cell. According to one aspect of the invention, a first insulating layer is formed o...	06/04/2002
6358812	Methods of forming storage capacitors Methods of forming capacitors and related integrated circuitry are described. In a preferred embodiment, the capacitors form part of a dynamic random access memory (DRAM) cell. According to one aspect of the invention, a first insulating layer is formed o...	03/19/2002
6288431	Semiconductor device and a method of manufacturing the same In a semiconductor device of this invention, a pillar projection serving as a very thin active region is formed on the surface of a p-type silicon semiconductor substrate. A gate electrode 21 is formed to cover a central portion of the pillar projection. ...	09/11/2001
6271556	High density memory structure A dynamic random access memory (DRAM) integrated circuit (10). The DRAM (10) includes a recessed region (20) defined in a semiconductor substrate (22). This recessed region has substantially vertical sides (34) extending from a bottom surface (32). A fiel...	08/07/2001
6222215	DRAM circuitry Methods of forming capacitors and related integrated circuitry are described. In a preferred embodiment, the capacitors form part of a dynamic random access memory (DRAM) cell. According to one aspect of the invention, a first insulating layer is formed o...	04/24/2001
6150211	Methods of forming storage capacitors in integrated circuitry memory cells and integrated circuitry Methods of forming capacitors and related integrated circuitry are described. In a preferred embodiment, the capacitors form part of a dynamic random access memory (DRAM) cell. According to one aspect of the invention, a first insulating layer is formed o...	11/21/2000
6107105	Amorphous tin films for an integrated capacitor dielectric/bottom plate using high dielectric constant material The present invention provides a capacitor formed in a dynamic random access memory (DRAM) semiconductor device, the capacitor comprising: a polysilicon layer to making contact with a diffusion region of an access device; a TiN comprising layer overlying ...	08/22/2000
6081008	Composite trench-fin capacitors for DRAM A semiconductor memory device capacitor is disclosed which has a trench capacitor portion provided in a semiconductor substrate and a fin capacitor portion provided above the substrate. The trench capacitor portion includes (i) a trench extending from an ...	06/27/2000
5989955	Method of forming stacked and trench type DRAM capacitor A DRAM capacitor structure and its manufacturing include covering a semiconductor substrate with a first conducting layer. A first insulating layer and a second insulating layer are alternately stacked at least once above the first conducting layer to for...	11/23/1999
5910667	Structure for a stacked dram capacitor A DRAM capacitor structure and its manufacturing method which includes providing a semiconductor substrate with a MOS transistor already formed above, and that the MOS transistor includes a gate and source/drain regions, then forming a first insulating la...	06/08/1999
5903024	Stacked and trench type DRAM capacitor A DRAM capacitor structure and its manufacturing include covering a semiconductor substrate with a first conducting layer. A first insulating layer and a second insulating layer are alternately stacked at least once above the first conducting layer to for...	05/11/1999
5811283	Silicon on insulator (SOI) dram cell structure and process A silicon on insulator (SOI) DRAM has a layer of buried oxide covered by a thin layer of crystalline silicon on the surface of a bulk silicon substrate. Field oxide regions are formed extending through the thin crystalline silicon surface layer and into c...	09/22/1998
5795804	Method of fabricating a stack/trench capacitor for a dynamic random access memory (DRAM) A method is described for making an array of dynamic random access memory (DRAM) cells having both a trench and a stacked capacitor within each cell. The method involves forming a trench in the silicon substrate at the capacitor node contact area of the D...	08/18/1998
5792686	Method of forming a bit-line and a capacitor structure in an integrated circuit A dynamic random access memory (DRAM) integrated circuit (10). The DRAM (10) includes a recessed region (20) defined in a semiconductor substrate (22). This recessed region has substantially vertical sides (34) extending from a bottom surface (32). A fiel...	08/11/1998
5753549	Method for fabricating capacitor of semiconductor device A method for fabricating a capacitor of a semiconductor device which is capable of reducing data errors caused due to the interaction between neighboring capacitors, which includes the steps of forming a first trench in a semiconductor substrate, filling ...	05/19/1998
5712813	Multi-level storage capacitor structure with improved memory density DRAM cells using a multi-level storage capacitor structure is disclosed. Since the storage capacitors of the present invention can extend to the adjacent cells, they can have a much larger surface area than those using a single-level stacked capacitor str...	01/27/1998
5688709	Method for forming composite trench-fin capacitors for DRAMS A semiconductor memory device capacitor is disclosed which has a trench capacitor portion provided in a semiconductor substrate and a fin capacitor portion provided above the substrate. The trench capacitor portion includes (i) a trench extending from an ...	11/18/1997
5665624	Method for fabricating trench/stacked capacitors on DRAM cells with increased capacitance A method is described for making an array of dynamic random access memory (DRAM) cells having a trench/stacked capacitor within each cell. The method involves forming trenches in the silicon substrate at the capacitor node contact areas of the DRAM cells,...	09/09/1997
5640350	Multi-bit dynamic random access memory cell storage A single transistor capacitor stacked memory cell utilizing precharge voltage and spacial format to miximize storage per unit of area....	06/17/1997
5606189	Dynamic RAM trench capacitor device with contact strap A FEC-DRAM of 3 elements/2 bits type having a stack capacitor of increased capacitance to ensure integration with an increased density. The stack capacitor is formed as embedded in a trench, and local wiring is provided to form an electric contact on an e...	02/25/1997
5594682	High density self-aligned stack in trench DRAM technology A method, and resultant structure, is described for fabricating a high density DRAM cell in which a stacked capacitor using a pillar structure is formed in a trench. The DRAM cell includes a field effect transistor having a gate electrode and source/drain...	01/14/1997
5521111	Process of fabricating memory cell with a switching transistor and a trench-stacked capacitor coupled in series A memory cell is implemented by a series combination of a field effect transistor and a trench-stacked type storage capacitor, and an accumulating electrode is held in contact with a source region of the field effect transistor through an extremely narrow...	05/28/1996
5504027	Method for fabricating semiconductor memory devices A method for fabricating a semiconductor memory device including a matrix of memory cells each constituted by one transistor and one capacitor and capable of obtaining a large capacitance for achieving a high integration and yet maintaining superior chara...	04/02/1996
5455192	Method of making dynamic random access memory cell having a stacked capacitor and a trench capacitor A method of making a DRAM cell capable of increasing storage capacity and for which is amenable to large-scale integration. The method provides a DRAM cell having stacked and trench capacitors and a transistor of second conductivity type opposite to a fir...	10/03/1995
5442584	Semiconductor memory device and method for fabricating the same dynamic random access memory device construction A DRAM cell and a method for fabricating the same capable of obtaining a large capacitance for achieving a high integration and yet maintaining superior characteristics of elements. A capacitor structure is provided, which includes a common storage node f...	08/15/1995
5429978	Method of forming a high density self-aligned stack in trench A method, and resultant structure, is described for fabricating a high density DRAM cell in which a stacked capacitor using a pillar structure is formed in a trench. The DRAM cell includes a field effect transistor having a gate electrode and source/drain...	07/04/1995
5411911	Process for producing DRAM semiconductor devices A process for producing a semiconductor device comprises the following steps 1 to 9. In step 1, a field oxide layer is formed on a first conductivity type semiconductor substrate to define an active region. In step 2, gate electrodes, second conductivity ...	05/02/1995
5386131	Semiconductor memory device A DRAM having memory cells each consisting of a MOS transistor and a trench-stack capacitor built at a p-type silicon substrate. The MOS transistor comprises a source region made of the first diffused n- layer, and a drain region composed of th...	01/31/1995
5343354	Stacked trench capacitor and a method for making the same A stacked trench capacitor including a first trench formed in a semiconductor substrate, an insulating material, preferably BPSG, substantially filling the first trench to thereby define an isolation region of the substrate, a second trench formed in the ...	08/30/1994
5334547	Method of manufacturing a semiconductor memory having an increased cell capacitance in a restricted cell area A semiconductor memory includes at least one memory cell composed of an insulated gate field effect transistor and an associated stacked capacitor which are formed close to each other on a single substrate of a first conduction type. The insulated gate fi...	08/02/1994
5329146	DRAM having trench type capacitor extending through field oxide In a memory cell formed of one transistor and one capacitor, the capacitor includes a stacked type capacitor region extending over the gate electrode and word line of the transfer gate transistor, and a trench type capacitor region extending into a groove...	07/12/1994
5327375	DRAM cell utilizing novel capacitor A dynamic RAM is provided with enhanced charge storage capacity by increasing the surface area between the two electrodes of the storage capacitor. The first electrode consists of a thick conductive layer whose vertical sidewalls provide the extra surface...	07/05/1994

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Class 257/E27.094 - Having storage electrode extension stacked over the transistor (EPO)