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| Number | Title | Issue Date |
| 7391057 | High voltage silicon carbide devices having bi-directional blocking capabilities High voltage silicon carbide (SiC) devices, for example, thyristors, are provided. A first SiC layer having a first conductivity type is provided on a first surface of a voltage blocking SiC substrate having a second conductivity type. A first region of SiC is provi... | 06/24/2008 |
| 7332752 | Optoelectronic circuit employing a heterojunction thyristor device to convert a digital optical signal to a digital electrical signal An optoelectronic circuit includes a resonant cavity formed on a substrate and into which is injected an input digital optical signal that encodes bits of information (each bit representing an OFF logic level or an ON logic level). A heterojunction thyristor device,... | 02/19/2008 |
| 7326969 | Semiconductor device incorporating thyristor-based memory and strained silicon A semiconductor memory device may comprise a thyristor-based memory having some portions formed in strained silicon, and other portions formed in relaxed silicon. In a further embodiment, a thyristor in the thyristor-based memory may be formed in a region of relaxed... | 02/05/2008 |
| 7276778 | Semiconductor system functioning as thyristor in on-state, and as bipolar transistor in transient state or with overcurrent A semiconductor system includes a self arc-extinguishing device, and an IGBT that works as a thyristor when a current between a first terminal and a second terminal connected to a second well electrode is small, and as a bipolar transistor when that current is large... | 10/02/2007 |
| 7262443 | Silicide uniformity for lateral bipolar transistors Method and apparatus for forming a semiconductor device. The method includes defining a plurality of rows in a semiconductor layer. Thereafter, on one or more of the plurality of rows, one or more bipolar junction devices are formed. Each of the bipolar junction dev... | 08/28/2007 |
| 7183591 | Trench isolation for thyristor-based device A semiconductor device includes a thyristor body having at least one region in a substrate. According to an example embodiment of the present invention, a trench is in a substrate and adjacent to a thyristor body region in the substrate. The trench is lined with an ... | 02/27/2007 |
| 6552398 | T-Ram array having a planar cell structure and method for fabricating the same A T-RAM array having a planar cell structure is presented which includes a plurality of T-RAM cells. Each of the plurality of T-RAM cells is fabricated by using doped polysilicon to form a self-aligned diffusion region to create a low-contact resistance p... | 04/22/2003 |
| 6104045 | High density planar SRAM cell using bipolar latch-up and gated diode breakdown Area efficient static memory cells and arrays containing p-n-p-n or n-p-n-p transistors which can be latched-up in a bistable on state. Each transistor memory cell includes a gate which is pulse biased during the write operation to latch-up the cell. Also... | 08/15/2000 |
| 5851885 | Manufacturing method for ROM components having a silicon controlled rectifier structure A manufacturing method and a structure for ROM component having a silicon controlled rectifier as the basic memory instead of a channel transistor in a conventional ROM, and using a formation of contact windows for coding a ROM instead of performing an io... | 12/22/1998 |
| 5365086 | Thyristors having a common cathode A thyristor comprised of a vertical thyristor including, on its front surface, a localized anode region, and on its rear surface, a cathode metallization substantially coating the whole rear surface region, and, on its front surface region, a lateral thyr... | 11/15/1994 |
| 4891683 | Integrated SCR current sourcing sinking device This disclosure relates to a programmable write-once, read-only semiconductor memory array which has an improved current source for each bit line and an improved current sink for each Word line. This programmable write-once, read-only semiconductor memory... | 01/02/1990 |
| 4409673 | Single isolation cell for DC stable memory A fully selectable static memory cell formed in a single isolation region comprises a pair of word lines, an SCR latch including an NPN device and an associated parasitic PNP device connected between the word lines, and a pair of bit lines, each of which ... | 10/11/1983 |
| 4331884 | Two-pole overcurrent protection device A two-pole overcurrent protection device, intended for connection into a current-carrying conductor, comprises a normally conducting thyristor having members for firing the thyristor at low off-state voltage. The thyristor has a member for turning off the... | 05/25/1982 |
| 4246594 | Low crosstalk type switching matrix of monolithic semiconductor device The switching matrix with a plurality of individual lateral type PNPN type switching elements is disposed on a one chip silicon. The chip includes a double layered substrate having a thin P type layer with low impurity concentration epitaxial-grown on a P... | 01/20/1981 |
| 4130827 | Integrated circuit switching network using low substrate leakage current thyristor construction A semiconductor junction-isolated PNPN crosspoint switch array has a plurality of crosspoint switches that are each formed of four regions of alternating conductivity type in a semiconductor substrate. Low enough leakage to allow the crosspoint switch arr... | 12/19/1978 |
| 4130889 | Programmable write-once, read-only semiconductor memory array using SCR current sink and current source devices This disclosure relates to a programmable write-once, read-only semiconductor memory array which has an improved current source for each bit line and an improved current sink for each Word line. This programmable write-once, read-only semiconductor memory... | 12/19/1978 |
