Did You Know...
...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 7317240 | Redundant interconnect high current bipolar device and method of forming the device A device. The device includes two bipolar transistors electrically connected to each other. Each bipolar transistor of the two bipolar transistors may include a base contact and an emitter contact surrounding the base contact, wherein the emitters contacts of the tw... | 01/08/2008 |
| 7312497 | Fabrication of conductive lines interconnecting first conductive gates in nonvolatile memories having second conductive gates provided by conductive gate lines, wherein the adjacent conductive gate lines for the adjacent columns are spaced from each other, and non-volatile memory structures In a nonvolatile memory, the select gates (144S) are formed from one conductive layer (e.g. polysilicon or polyside), and the wordlines (144) interconnecting the select gates are made from a different conductive layer (e.g. metal). The wordlines overli... | 12/25/2007 |
| 7276762 | NROM flash memory devices on ultrathin silicon An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is normally fully depleted. An oxide layer provides an insulation layer between the source/drain areas and the ga... | 10/02/2007 |
| 5097316 | Complementary NPN and PNP lateral transistors separated from substrate by intersecting slots filled with substrate oxide for minimal interference therefrom The invention is a pair of complementary transistors or arrays thereof and method for producing same in sub-micron dimensions on a silicon substrate selectively doped P and N type by forming intersecting slots in spaced apart relation across the P substra... | 03/17/1992 |
| 4859930 | Current source arrangement A high accuracy current source arrangement is made up of a number of binary-weighted current sources each of which comprises a plurality of indentical transistors which are arranged regularly in a matrix of transistor elements on the surface area of an in... | 08/22/1989 |
| 4743899 | Decoder/multiplexer circuit including multi-emitter transistors A decoder/multiplexer circuit for selecting one of a plurality of input signals includes an array formed of a plurality of decode transistors. All of the collectors of the decode transistors are commonly formed in a large epitaxial pocket, thereby reducin... | 05/10/1988 |
| 4682197 | Power transistor with spaced subtransistors having individual collectors This integrated semiconductor device aims at drastic reduction of the direct secondary breakdown phenomena and has a plurality of side-by-side elementary transistors forming an interdigited structure. To reduce the thermal interaction between the elementa... | 07/21/1987 |
| 4651409 | Method of fabricating a high density, low power, merged vertical fuse/bipolar transistor A fuse programmable ROM includes a wafer for a CMOS-type structure having an emitter, which emitter is overlain by a fuse pad of an undoped polysilicon and a conductive layer. There is a layer of barrier oxide disposed on the conductive top layer of the f... | 03/24/1987 |
| 4571606 | High density, high voltage power FET Lateral FET structure is disclosed with an insulative region such as porous silicon filled with oxide formed in the drift region to divert the drift region current path and increase the length thereof to afford higher OFF state blocking voltage without in... | 02/18/1986 |
| 4518874 | Cascoded PLA array A bipolar transistor integrated circuit PLA is disclosed. The array includes a first and second mutually isolated epitaxial regions in a semiconductor substrate. A plurality of common collector bipolar transistors are formed in the first epitaxial region ... | 05/21/1985 |
| 4475119 | Integrated circuit power transmission array A power transistor array integrated circuit includes an array of transistors, each having an electrode connected in common to a conductive line forming a part of the integrated circuit. The electrodes of the transistors are spaced along the conductive lin... | 10/02/1984 |
| 4373165 | Very high density punch-through read-only-memory A semiconductor read-only-memory (ROM) device having an array of punch-through devices as memory cells. The cells are formed at the crossing points of two pluralities of parallel elongated regions, the two pluralities being perpendicular to each other. On... | 02/08/1983 |
| 4311926 | Emitter coupled logic programmable logic arrays Programmable logic arrays can be formed utilizing emitter coupled logic. Input terminals and control terminals associated with a programmable logic array module are coupled to the input terminals of a predetermined set of OR circuit means within the modul... | 01/19/1982 |
| 3981072 | Bipolar transistor construction method A thick layer of silicon dioxide is grown on a semiconductive substrate and then etched to form an elongated opening that defines the outer boundaries of a diffused transistor. The thick silicon dioxide layer serves as a permanent fixed, diffusion mask. T... | 09/21/1976 |
