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Actor Marlon Brando has four patents, all named "Drumhead tensioning device and method."
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| Number | Title | Issue Date |
| 7365355 | Programmable matrix array with phase-change material A phase-change material is proposed for coupling interconnect lines an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer between the phase change material and at least one of the lines. The matrix ... | 04/29/2008 |
| 7332779 | Memory with split gate devices and method of fabrication A DRAM fabricated on an SOI substrate employing single body devices as memory cells without relying on a field through the insulative layer of the SOI is described. Floating body devices are defined by orthogonally disposed lines with both a front gate and back gate... | 02/19/2008 |
| 7283383 | Phase change resistor cell, nonvolatile memory device and control method using the same A nonvolatile memory device features a phase change resistor cell as a cross-point cell using a phase change resistor and a serial diode switch. The phase change resistor has logic data corresponding to a crystallization state changed by the amount of current suppli... | 10/16/2007 |
| 7190050 | Integrated circuit on corrugated substrate By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-powe... | 03/13/2007 |
| 7135747 | Semiconductor devices having thermal spacers A high power, high frequency semiconductor device has a plurality of unit cells connected in parallel. The unit cells each having a controlling electrode and first and second controlled electrodes. A thermal spacer divides at least one of the unit cells into a first... | 11/14/2006 |
| 6700211 | Method for forming conductors in semiconductor devices A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby ... | 03/02/2004 |
| 6670824 | Integrated polysilicon fuse and diode An integrated polysilicon fuse and diode and methods of making the same are provided. The integrated polysilicon fuse and diode combination may be implemented in a programmable cross point fuse array. The integrated polysilicon fuse and diode may be used ... | 12/30/2003 |
| 6670713 | Method for forming conductors in semiconductor devices A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby ... | 12/30/2003 |
| 6657278 | Diverse band gap energy level semiconductor device Hetero-structure semiconductor devices having first and second-type semiconductor junctions are disclosed. The hetero-structures are incorporated into pillar and rail-stack memory circuits improving the forward-to-reverse current ratios thereof.... | 12/02/2003 |
| 6653733 | Conductors in semiconductor devices A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby ... | 11/25/2003 |
| 6649451 | Structure and method for wafer comprising dielectric and semiconductor Wafers of the present invention comprise a semiconductor layer and a dielectric layer. The semiconductor layer is patterned to form semiconductor regions, and the dielectric layer is deposited on top of the semiconductor layer. Chemical mechanical planari... | 11/18/2003 |
| 6643165 | Electromechanical memory having cell selection circuitry constructed with nanotube technology A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotub... | 11/04/2003 |
| 6591394 | Three-dimensional memory array and method for storing data bits and ECC bits therein A three-dimensional memory array and method for storing data bits and ECC bits therein is provided. A three-dimensional memory array of the type that includes multiple vertically-stacked layers of memory cells is described. The three-dimensional memory ar... | 07/08/2003 |
| 6563220 | Method for forming conductors in semiconductor devices A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby ... | 05/13/2003 |
| 6534841 | Continuous antifuse material in memory structure A memory structure has an antifuse material that is unpatterned and sandwiched between each of a plurality of antifuse electrode pairs. The antifuse material is continuous between the antifuse electrode pairs. Furthermore the present invention includes a ... | 03/18/2003 |
| 6459095 | Chemically synthesized and assembled electronics devices A route to the fabrication of electronic devices is provided, in which the devices consist of two crossed wires sandwiching an electrically addressable molecular species. The approach is extremely simple and inexpensive to implement, and scales from wire ... | 10/01/2002 |
| 6455106 | Method of forming oxide-ceramics film A process for the formation of an oxide ceramic thin film, which permits the control of film oxygen content and can give a film reduced in oxygen deficiency. The process is characterized in that the step of forming an amorphous thin film, the step of heat... | 09/24/2002 |
| 6403403 | Diode isolated thin film fuel cell array addressing method The method addresses and interrogates addressable cells having at least one element including a polysilicon resistor functioning as a heating element and blocking diode preventing sneak current to un addressed elements, for selectively addressing one of t... | 06/11/2002 |
| 6376284 | Method of fabricating a memory device A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby ... | 04/23/2002 |
| 6369431 | Method for forming conductors in semiconductor devices A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby ... | 04/09/2002 |
| 6326936 | Electrode means, comprising polymer materials, with or without functional elements and an electrode device formed of said means In an electrode device for addressing a functional element a layer of electrical isolating materials is provided between first and second electrodes intersecting without direct physical or electrical contact and forming a bridge structure. Over both elect... | 12/04/2001 |
| 6291836 | Method of operating a programmable, non-volatile memory device The invention relates to an erasable non-volatile memory in which a diode is formed at each point of intersection between the x-selection lines (Ki) and y-selection lines (Rj), of which diode the anode and cathode are conductively co... | 09/18/2001 |
| 6143642 | Programmable semiconductor structures and methods for making the same Disclosed is a method for making a programmable structure on a semiconductor substrate. The semiconductor structure has a first dielectric layer. The method includes plasma patterning a first metallization layer over the first dielectric layer. Forming a ... | 11/07/2000 |
| 6103583 | Method for producing quantization functional device A quantization functional device includes: a silicon thin layer having a first surface and a second surface each made of a predetermined crystal surface, and the silicon thin layer being formed of single crystalline silicon having a thickness sufficiently... | 08/15/2000 |
| 6020616 | Automated design of on-chip capacitive structures for suppressing inductive noise Disclosed is a network of on-chip capacitive structures for suppressing power supply inductive noise, methods for making, and systems for designing the on-chip capacitive structures. The network includes a plurality of dummy active regions that are disper... | 02/01/2000 |
| 5945687 | Quantization functional device, quantization functional apparatus utilizing the same, and method for producing the same A quantization functional device includes: a silicon thin layer having a first surface and a second surface each made of a predetermined crystal surface, and the silicon thin layer being formed of single crystalline silicon having a thickness sufficiently... | 08/31/1999 |
| 4796074 | Method of fabricating a high density masked programmable read-only memory The word line pitch within a read-only memory is decreased, thereby increasing the cell density within the memory, without imposing any additional or stricter spacing rules or fabrication techniques utilized in the manufacture of the read-only memory inte... | 01/03/1989 |
| 4782340 | Electronic arrays having thin film line drivers Fully integrated thin film electronic arrays including thin film line driver circuits and address decoding circuits are disclosed. Each line driver employs a two terminal thin film threshold switching device of the type exhibiting a negative resistance ch... | 11/01/1988 |
| 4598386 | Reduced-area, read-only memory A reduced-area, read-only memory, including a programmable read-only memory, accomplished with a first step of removing one word address line from the word decoder input and one bit address line from the bit decoder input. The number of decoder output lin... | 07/01/1986 |
| 4455495 | Programmable semiconductor integrated circuitry including a programming semiconductor element A programmable semiconductor integrated circuitry including a circuit programming element is disclosed. The circuit programming element can be activated in a short-circuit mode by the irradiation of a laser or electron beam or by ion implantation so that ... | 06/19/1984 |
| 4376984 | Programmable read-only memory device A PROM (programmable read-only memory) device includes both PROM cells and peripheral circuits cooperating therewith with the PROM cells and peripheral circuits formed in and on the same bulk. The bulk is formed free of metal which acts as a life time kil... | 03/15/1983 |
| 4356347 | Integrated stylus array for printer operation A solid state multiple mode stylus array capable of printing, copying, or transmission, the various operating components of which are integrally formed on a substrate to provide a monolithic device. The array components include plural printing styli arran... | 10/26/1982 |
| 4266151 | Semiconductor circuit with at least two field effect transistors united in a semiconductor crystal A monolithically integrated MOS-circuit with a substrate bias voltage generator is disclosed. A generator, a control loop, a threshold voltage detector, and a pump circuit are provided. An acceleration of the regulation of the substrate bias voltage is ac... | 05/05/1981 |
| 4257019 | Charge transfer recursive filter As all the weighting coefficients of the filter are positive, a weighted charge quantity is collected by a line beneath one of the elementary electrodes of each weighting electrode. A charge reading device is coupled to the line and supplies an electrical... | 03/17/1981 |
| 4247863 | Semiconductor memory device Disclosed herein is a small-sized semiconductor memory device, wherein an N+ (P+)-type single region having an input function and an output function and an electrode for controlling the electrical potential in a P(N)-type Si substrat... | 01/27/1981 |
| 4180866 | Single transistor memory cell employing an amorphous semiconductor threshold device A single transistor memory cell wherein the memory cell is provided by the base collector capacitance of the transistor in the integrated circuit chip. Mounted on top the chip in electrical contact with the base of the transistor is an amorphous semicondu... | 12/25/1979 |
| 4143383 | Controllable impedance attenuator having all connection contacts on one side A semiconductor device having two PIN-diodes arranged in series and in opposition, in which the semiconductor body comprises two surface zones of a first conductivity type which extend in a high-ohmic surface layer, said surface layer separating the surfa... | 03/06/1979 |
| 4126899 | Junction field effect transistor random access memory A random access memory (RAM) in which each memory cell includes a JFET having two gate electrodes selectable by means of a single word line and a single bit line. The JFETs have a common electrode formed from the substrate of a semiconductor body common t... | 11/21/1978 |
| 4037243 | Semi conductor memory cell utilizing sensing of variations in PN junction current conrolled by stored data Charge is stored on the gate of a gate controlled diode in a memory element to provide a junction breakdown memory cell. A quantity of charge representative of a logical 1 or a logical 0 may be dynamically stored in one embodiment. In another embodiment a... | 07/19/1977 |
| 3986177 | Semiconductor store element and stores formed by matrices of such elements A novel semiconductor store element comprises a bistable pnpn structure of the kind described in the copending Patent application Ser. No. 527,918, addressed by a structure of the same type. The system has an area of the order of 10 to 20 square microns a... | 10/12/1976 |
