...that to encourage use of his new invention, the shopping cart, market owner Sylvan Goldman hired fake shoppers to push the carts around his store in Oklahoma City? Seems his customers were reluctant to give up their hand-carried baskets.
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| Number | Title | Issue Date |
| 7242050 | Stacked gate memory cell with erase to gate, array, and method of manufacturing A stacked gate nonvolatile memory floating gate device has a control gate. Programming of the cell in the array is accomplished by hot channel electron injection from the drain to the floating gate. Erasure occurs by Fowler-Nordheim tunneling of electrons from the f... | 07/10/2007 |
| 7196367 | Spin polarization amplifying transistor An embodiment of the invention is a transistor formed in part by a ferromagnetic semiconductor with a sufficiently high ferromagnetic transition temperature to coherently amplify spin polarization of a current. For example, an injected non-polarized control current ... | 03/27/2007 |
| 6518139 | Power semiconductor device structure with vertical PNP transistor A power semiconductor device structure formed in a chip of semiconductor material includes an N-type substrate and an N-type epitaxial layer. The structure comprises a P-type insulation region which forms a pocket in which control circuitry is formed, and... | 02/11/2003 |
| 6441437 | Integrated semiconductor circuit with protective structure for protection against electrostatic discharge An integrated semiconductor circuit includes a protective structure for protection against electrostatic discharge. The protective structure is disposed between a terminal pad and the integrated semiconductor circuit and is connected to at least one busba... | 08/27/2002 |
| 6291303 | Method for manufacturing a bipolar junction device A method of forming an improved bipolar junction device structure. By forming a well region around the emitter terminal, the area of distribution of ions within the emitter terminal of a vertical bipolar junction transistor is enlarged. Furthermore, by fo... | 09/18/2001 |
| 6150225 | Method for fabricating a semiconductor device having vertical and lateral type bipolar transistors A semiconductor device has a P type semiconductor substrate 1, a vertical type bipolar transistor having an N type base region 4, a lateral type bipolar transistor having an N type base region 4 formed on the semiconductor substrate 1, an N type collector... | 11/21/2000 |
| 6060762 | Integrated structure with reduced injection of current between homologous regions An integrated semiconductor structure comprises two homologous P-type regions formed within an N-type epitaxial layer. A P-type region formed in the portion of the epitaxial layer disposed between the two P-type regions includes within it an N-type region... | 05/09/2000 |
| 5914522 | Power semiconductor structure with lateral transistor driven by vertical transistor A power semiconductor structure (200), in particular in VIPower technology, made from a chip of N-type semiconductor material (110), comprising a bipolar or field-effect vertical power transistor (125, 120, 110) having a collector or drain region in such ... | 06/22/1999 |
| 5763934 | Integrated electronic device with reduced parasitic currents, and corresponding methods The present invention relates to an electronic device integrated monolithlly on a semiconductor material comprising a substrate having a first conductivity type in which are formed first and second diffusion regions of a second conductivity type. The sub... | 06/09/1998 |
| 5679587 | Method of fabricating an integrated circuit with vertical bipolar power transistors and isolated lateral bipolar control transistors An integrated circuit containing both power and small-signal NPN bipolar devices. The small-signal devices use lateral current flow, and are completely surrounded (laterally and vertically) by an N-type well region. The N-type well region itself is comple... | 10/21/1997 |
| 5670821 | Guard ring for mitigation of parasitic transistors in junction isolated integrated circuits A guard ring with the same conductivity as a device pocket surrounds the pocket and a pocket isolation ring to establish a parasitic transistor that conducts current between the guard ring and the pocket when the pocket voltage is driven sufficiently belo... | 09/23/1997 |
| 5650657 | Protection from short circuits between P and N wells A method of manufacture of a MOSFET device with a predetermined light positive or negative doping comprises forming a first mask upon said substrate. Dopant of a predetermined positive or negative variety is implanted through the mask. A second mask is fo... | 07/22/1997 |
| 5565701 | Integrated circuit with vertical bipolar power transistors and isolated lateral bipolar control transistors An integrated circuit containing both power and small-signal NPN bipolar devices. The small-signal devices use lateral current flow, and are completely surrounded (laterally and vertically) by an N-type well region. The N-type well region itself is comple... | 10/15/1996 |
| 5545918 | Circuit construction for controlling saturation of a transistor An integrated circuit including a semiconductor substrate, a semiconductor layer formed on the substrate, a desired bipolar transistor formed in the semiconductor layer. First and second parasitic elements are formed in the integrated circuit. An element ... | 08/13/1996 |
| 5508553 | Transversal bipolar transistor integrated with another transistor commonly provided on a semiconductor substrate A transversal bipolar transistor is structured to have a single crystal semiconductor film provided on a single crystal semiconductor region which is provided on a semiconductor substrate. The semiconductor substrate is of a first conductivity type, and t... | 04/16/1996 |
| 5508551 | Current mirror with saturation limiting A transistor built on a substrate employs two collectors, an output collector and a secondary collector. The purpose of the secondary collector is to collect minority carriers at saturation and feed these minority carriers back to the input reference of a... | 04/16/1996 |
| 5418386 | Circuit construction for controlling saturation of a transistor An integrated circuit including a semiconductor substrate, a semiconductor layer formed on the substrate, a desired bipolar transistor formed in the semiconductor layer. First and second parasitic elements are formed in the integrated circuit. An element ... | 05/23/1995 |
| 5382837 | Switching circuit for semiconductor device A circuit for connecting a first circuit node to either a second or a third circuit node relative to the voltage potential on the third circuit node includes two bipolar transistors connected in series. The collectors of both transistors are connected to ... | 01/17/1995 |
| 5372955 | Method of making a device with protection from short circuits between P and N wells A method of manufacture of a MOSFET device with a predetermined light positive or negative doping comprises forming a first mask upon said substrate. Dopant of a predetermined positive or negative variety is implanted through the mask. A second mask is fo... | 12/13/1994 |
| 5329147 | High voltage integrated flyback circuit in 2 μm CMOS When a field effect transistor is used to control the current through an inductive load, the flyback voltage is felt through the vertical pnp transistor at the drain, which onducts to the substrate. This current represents a power loss and a source of hea... | 07/12/1994 |
| 5287047 | Motor drive circuit and motor drive system using the same A motor drive circuit, in which a first transistor at a drive stage, a second transistor at an output stage to be driven by the first transistor and a third transistor downstream the output stage for a short braking operation are formed in a common substr... | 02/15/1994 |
| 5262689 | BIMOS current driver circuit A first IGFET and a first bipolar transistor are connected in series between a first power terminaland a first load terminal. A second IGFET and a second bipolar transistor are connected in series between a second load terminal and a second power terminal... | 11/16/1993 |
| 5237198 | Lateral PNP transistor using a latch voltage of NPN transistor A lateral PNP transistor having either of the collector or the emitter diffusion layers layered with an n+ type diffusion layer, is shown. The added layer serves to increase the static electricity withstand stress along a transistor dischargin... | 08/17/1993 |
| 5229711 | Reference voltage generating circuit A reference voltage generating circuit is provided which includes a first voltage producing circuit having a first transistor, a first resistor, and a second resistor for producing a first voltage based on the base-emitter voltage of the first transistor ... | 07/20/1993 |
| 5221855 | Monolithic vertical-type semiconductor power device with a protection against parasitic currents A monolithic vertical-type semiconductor power device comprises an N+ type substrate 1 over which there is superimposed an N- type epitaxial layer 2 in which there is obtained a P type isolation pocket 3. The pocket 3 contains N type regions 4, 15 and P t... | 06/22/1993 |
| 5204543 | Lateral type semiconductor device having a structure for eliminating turning-on of parasitic MOS transistors formed therein A semiconductor device comprises a substrate of a first conduction type defined by a major surface, a pair of conductive regions of a second conduction type formed in the substrate along the major surface, an intervening region of the first conduction typ... | 04/20/1993 |
| 5179432 | Integrated PNP power bipolar transistor with low injection into substrate In one embodiment of the invention, a P buried region is formed in an N epitaxial layer and isolated from a P substrate by an N buried region. P+ emitters and P+ collectors are formed in the surface of the N epitaxial layer (acting as a base). The P burie... | 01/12/1993 |
| 5066869 | Reset circuit with PNP saturation detector A power supply reset circuit with a PNP transistor for detecting saturation of an NPN transistor and resetting a fault latch. The PNP and NPN transistors may be separate, discrete components. A preferred embodiment includes a vertical NPN transistor forme... | 11/19/1991 |
| 4949212 | Circuit configuration for protecting an integrated circuit A circuit configuration for protecting an integrated circuit from damage by a voltage present at an output exceeding the supply voltage range of the integrated circuit includes a given number of parasitic circuit structures of the integrated circuit. Addi... | 08/14/1990 |
| 4936928 | Semiconductor device A semiconductor structure is provided comprising a bulk substrate of semiconductor material having a first-type doping conductivity in a first dopant concentration. A first layer of semiconductor material is epitaxially formed on the substrate, such first... | 06/26/1990 |
| 4886982 | Power transistor with improved resistance to direct secondary breakdown This power transistor comprises a plurality of elementary transistors, also indicated as "fingers", having their emitter terminals mutually connected and forming a common emitter terminal, collector terminals also mutually connected and forming a common c... | 12/12/1989 |
| 4886985 | Transistor arrangement with an output transistor A transistor arrangement, particularly for the fast switching of inductive loads, includes a driving first transistor and a power output second transistor (T1, T2) interconnected as a Darlington pair having a base terminal, an emitter terminal and a colle... | 12/12/1989 |
| 4714842 | Integrated injection logic circuits An "Integrated Injection Logic" integrated circuit in which bias currents are supplied by means of a current injector. The current injector is a multi-layer structure in which current is supplied by means of injection and collection of charge carriers via... | 12/22/1987 |
| 4712152 | Semiconductor integrated circuit device A semiconductor integrated circuit device comprising: at least two NPN transistors whose bases and emitters are connected to the ground and whose collectors are connected to an input terminal; one of said NPN transistors having a lower breakdown starting ... | 12/08/1987 |
| 4710793 | Voltage comparator with hysteresis A differential amplifier operated as a voltage comparator includes first and second transistors coupled to first and second inputs respectively of the comparator whereby an applied input signal produces output transitions at an output of the differential ... | 12/01/1987 |
| 4654543 | Thyristor with "on" protective circuit and darlington output stage A thyristor is preferably fabricated as a single thyristor device in an integrated circuit. The thyristor is made conductive by applying an ordinary gating voltage to the gate thereof. However, the thyristor can be kept in a conductive state, even though ... | 03/31/1987 |
| 4613887 | Semiconductor device with a means for discharging carriers In an output transistor of transistor-transistor logic (TTL) circuits, an output transistor of TTL is provided with, in a region between a p-type base region and the p-type semiconductor substrate on which a TTL circuit is fabricated, a p- diff... | 09/23/1986 |
| 4595942 | Integrated circuit A compact integrated logic circuit having an inverter transistor and several coupling diodes adjoining the collector region of said transistor. Current is applied to the base of the transistor which forms the signal input. The inverter transistor has addi... | 06/17/1986 |
| 4577397 | Method for manufacturing a semiconductor device having vertical and lateral transistors The present invention provides a semiconductor device which includes a thick countersunk oxide layer selectively formed by the LOCOS process on the surface of a silicon body, openings formed in this oxide layer, and semiconductor element regions formed by... | 03/25/1986 |
| 4558286 | Symmetrical diode clamp A two terminal monolithic integrated clamp circuit includes first and second circuits coupled between the two input terminals thereof for clamping the voltage appearing across the two terminals to a predetermined voltage. The first circuit is responsive t... | 12/10/1985 |