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| Application No. | Application Title | Issue Date |
| 20110310684 | SEMICONDUCTOR INTEGRATED CIRCUIT A semiconductor integrated circuit includes a P-type MOS transistor and two or more N-type MOS transistors connected together in series between a first and a second power supply, an input terminal connected to a gate terminal of the P-type MOS transistor and gate termin... | 12/22/2011 |
| 20110156143 | Parasitic Vertical PNP Bipolar Transistor And Its Fabrication Method In Bicmos Process This invention published a parasitic vertical PNP bipolar transistor in BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) process; the bipolar transistor comprises a collector, a base and an emitter. Collector is formed by active region with p-type ion implanting... | 06/30/2011 |
| 20110079821 | Integrated Devices on a Common Compound Semiconductor III-V Wafer A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the fir... | 04/07/2011 |
| 20100007316 | Current Sensing In a Buck-Boost Switching Regulator Using Integrally Embedded PMOS Devices A current sense device for a power transistor is described. The power transistor is formed in a cellular structure including a cellular array of transistor cells. The current sense device includes multiple transistor cells in the cellular array of transistor cells of th... | 01/14/2010 |
| 20090108346 | HYBRID-MODE LDMOS An MOS-bipolar hybrid-mode LDMOS device has a main gate input and a control gate input wherein the device operates in an MOS mode when both gate inputs are enabled, and operates in a bipolar mode when the main gate input is enabled and the control gate input is disabled... | 04/30/2009 |
| 20090050961 | Semiconductor Device A semiconductor device is disclosed which has a shorter turn-on time. The semiconductor device includes an epitaxial layer, two base regions embedded in a surface portion of the epitaxial layer, source regions respectively embedded in the base regions, a drain region in... | 02/26/2009 |
| 20080265329 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING IT A semiconductor device which has a semiconductor body and a method for producing it. At the semiconductor body, a first electrode which is electrically connected to a first near-surface zone of the semiconductor body and a second electrode which is electrically connecte... | 10/30/2008 |
| 20080180160 | HIGH VOLTAGE DUAL GATE CMOS SWITCHING DEVICE AND METHOD A dual gate drain extension field effect transistor assembly comprises a first FET device having a source, a gate and a drain extension region. The first FET device's gate is electrically coupled to a constant voltage source. A second FET device has a source, a drain, a... | 07/31/2008 |
| 20080122008 | Memory cell A memory cell includes diffusion regions formed in a substrate. Each of the diffusion regions extends along a vertical direction in a layout view at a substrate level. A first gate electrode structure at a gate electrode level is generally dogleg shaped. The first gate ... | 05/29/2008 |
| 20080061323 | Examination apparatus for biological sample and chemical sample A wireless sensor chip suitable for the compact, high-sensitive, and low-cost examination apparatus for easily examining a biological material such as gene at low cost is provided. A sensor chip is formed on an SOI substrate, and an n type semiconductor layer on which a... | 03/13/2008 |
