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| Number | Title | Issue Date |
| 7388275 | Electronic package with integrated capacitor Generally provided is a circuit assembly construction for controlling impedance in an electronic package. A large scale, parallel-plate capacitor includes two electrodes separated by a dielectric material. The electrodes serve as reference voltage planes for the ele... | 06/17/2008 |
| 7381582 | Method and structure of ion implanted elements for the optimization of resistance A method of forming a piezo-resistive sensor, comprising a piezo-resistor, a leadout resistor, and an insulator structure is provided. A Silicon-On-Insulator (SOI) substrate is provided having an epitaxial layer, a dielectric layer, and a bulk substrate layer. A mas... | 06/03/2008 |
| 7332814 | Bondwire utilized for coulomb counting and safety circuits A sense resistor and integrated circuit package combination is disclosed. A package lead frame is provided having a plurality of landing zones associated therewith and a die mounting area for mounting of a die thereon. The die has a plurality of bond pads associated... | 02/19/2008 |
| 7199443 | Integration of filters using on-chip transformers for RF and wireless applications A band pass filter (114) is formed on an integrated circuit (IC) chip (102). Such band pass filter (114) may be used in a RF or wireless communication device, such as a mobile phone or a personal data assistant (PDA). The band pass filter (11... | 04/03/2007 |
| 7148535 | Zero capacitance bondpad utilizing active negative capacitance The present invention is an apparatus and system for reducing bondpad capacitance of an integrated circuit. Circuitry of the present invention may produce a negative capacitance approximately equal in magnitude to the capacitance associated with the bondpad and ther... | 12/12/2006 |
| 6670649 | Triodic rectifier switch The present invention discloses a triodic rectifier switch (TRS) having two diodes and one resistor. Each of the two diodes includes first and second electrodes, the first electrode made of a material having a work function of more than 4.5 eV (electron v... | 12/30/2003 |
| 6657310 | Top layers of metal for high performance IC's A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or pol... | 12/02/2003 |
| 6638808 | Method of manufacturing gate driver with level shift circuit A method for forming a gate driver configured to drive a power semiconductor device includes providing a substrate having an upper surface; forming a conductive region on a portion of the upper surface of the substrate; forming a dielectric layer overlyin... | 10/28/2003 |
| 6627968 | Integrated capacitor and fuse A process for forming a capacitive structure and a fuse structure in an integrated circuit device includes forming a first capacitor plate and first and second fuse electrodes in a first dielectric layer of the device. In a second dielectric layer overlyi... | 09/30/2003 |
| 6624079 | Method for forming high resistance resistor with integrated high voltage device process The method for forming high voltage device combined with a mixed mode process use an un-doped polysilicon layer instead of the conventional polysilicon layer. In the high resistance area, the ion implant is not used until the source region and the drain r... | 09/23/2003 |
| 6621143 | Precision high-frequency capacitor on semiconductor substrate A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resis... | 09/16/2003 |
| 6621142 | Precision high-frequency capacitor formed on semiconductor substrate A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resis... | 09/16/2003 |
| 6605854 | Schottky diode with bump electrodes The package size of a diode is made smaller. On the element forming face of a semiconductor substrate having a p- -type conductive type, after a hyper-abrupt p+ n+ junction of a p+ -type diffusion layer, an n | 08/12/2003 |
| 6538300 | Precision high-frequency capacitor formed on semiconductor substrate A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resis... | 03/25/2003 |
| 6528383 | Simultaneous formation of deep trench capacitor and resistor A compact resistor is formed in an integrated circuit using many of the same steps as are employed in forming a trench capacitor for a DRAM cell; in particular depositing a layer of heavily doped germanium in the trench interior after the step of doping t... | 03/04/2003 |
| 6495426 | Method for simultaneous formation of integrated capacitor and fuse A process for forming a capacitive structure and a fuse structure in an integrated circuit device includes forming a first capacitor plate and first and second fuse electrodes in a first dielectric layer of the device. In a second dielectric layer overlyi... | 12/17/2002 |
| 6417061 | Zener diode and RC network combination semiconductor device for use in integrated circuits and method therefor An improved semiconductor device and method which includes a zener diode and RC network combination that share common semiconductor mask steps during the fabrication process. A common N+ layer serves to provide both the separate N+ cathode regions of the ... | 07/09/2002 |
| 6278871 | Integrated circuit including a low-dispersion capacitive network The present invention relates to an integrated circuit comprising a series of conducting layers (1) . . . (6), separated in pairs by insulating layers, including a capacitive element CF formed by a stack of conducting layers cut out of the conducting laye... | 08/21/2001 |
| 6262442 | Zener diode and RC network combination semiconductor device for use in integrated circuits An improved semiconductor device which includes a zener diode and RC network combination that share common semiconductor mask steps during the fabrication process. A common N+ layer serves to provide both the separate N+ cathode regions of the zener diode... | 07/17/2001 |
| 6140188 | Semiconductor device having load device with trench isolation region and fabrication thereof A small-area, high-resistance load device is fabricated in the same area used for the shallow trench isolation region. In an example embodiment, the load device comprises a series resistor coupled to a poly-silicon diode. In one example application, the l... | 10/31/2000 |
| 5847423 | Semiconductor device having a thin film capacitor and a resistance measuring element A semiconductor device having thin film capacitors and containing resistance measuring elementsis disclosed. The thin film capacitor comprises a bottom electrode, a high permittivity dielectric, and a top electrode stacked on an interlayer insulation film... | 12/08/1998 |
| 5736778 | Silicon resistor with expansion plate electrode A high power resistor is formed of a wafer of silicon captured between two molybdenum electrodes. A P-I-N diode of ring shape or wafer shape is concentric with a silicon resistor and has surfaces which are coplanar with the silicon resistor to form a devi... | 04/07/1998 |
| 5468673 | Avalanche diode incorporated in a bipolar integrated circuit A reference diode is formed in an N-type insulated well. An avalanche diode includes a P-type deep region having a high doping level, beneath which is formed an N-type overlapping buried layer, a P-type deep diffused region contacting a central portion of... | 11/21/1995 |
| 5414295 | Avalance diode incorporated in a bipolar integrated circuit A reference diode is formed in an N-type insulated well. An avalanche diode includes a P-type deep region having a high doping level, beneath which is formed an N-type overlapping buried layer, a P-type deep diffused region contacting a central portion of... | 05/09/1995 |
| 5343070 | Mesa type PIN diode A mesa-type PIN diode and method for making same are disclosed. A diode made according to the present invention includes a junction formed in the top surface of the mesa-shaped structure, having an area that is less than (and preferrably, approximately ha... | 08/30/1994 |
| 5268310 | Method for making a mesa type PIN diode A mesa-type PIN diode and method for making same are disclosed. A diode made according to the present invention includes a junction formed in the top surface of the mesa-shaped structure, having an area that is less than (and preferrably, approximately ha... | 12/07/1993 |
| 5241213 | Buried zener diode having auxiliary zener junction access path A buried Zener diode has an auxiliary Zener junction access path in parallel with the force anode/cathode path. Unlike the force anode/cathode path, the auxiliary path is effectively by-passed by the current flowing between the force anode and cathode dur... | 08/31/1993 |
| 5138418 | Transistor structure for testing emitter-base junction In accordance with the present invention, a metal electrode in contact with a resistive region formed in a base region is spaced from either a base bonding pad or an emitter electrode. The metal electrode is connected with the pad or the emitter electrode... | 08/11/1992 |
| 5089875 | Semiconductor device with MIS capacitor According to a semiconductor device with a MIS capacitor, an n+ -type diffusion layer and an n- -type epitaxial layer are formed on a p-type semiconductor sub-strate. An n-type diffusion layer and a p-type well region are formed in t... | 02/18/1992 |
