Did You Know...
...that the Slinky toy was the result of a failed attempt by engineer Richard James to produce an antivibration device for ship instruments? His goal was to develop a spring that would instantaneously counterbalance the wave motion that rocks a ship at sea. Instead, he developed the Slinky.
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| Number | Title | Issue Date |
| 7444041 | System, method and apparatus for improved electrical-to-optical transmitters disposed within printed circuit boards The present invention provides a system, method and apparatus for improved electrical-to-optical transmitters (100) disposed within printed circuit boards (104). The heat sink (110, 200) is a thermal conductive material disposed within a cavity ... | 10/28/2008 |
| 7425758 | Metal core foldover package structures Chip-scale packages and assemblies thereof and methods of fabricating such packages including Chip-On-Board, Board-On-Chip, and vertically stacked Package-On-Package modules are disclosed. The chip-scale package includes a core member of a metal or alloy having a re... | 09/16/2008 |
| 7411304 | Semiconductor interconnect having conductive spring contacts An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor component. Each interconnect contact includes a compliant conductive layer ... | 08/12/2008 |
| 7405485 | Semiconductor device A semiconductor device provided with a first semiconductor chip having a first functional surface formed with a first functional element and a first rear surface, a second semiconductor chip having a second functional surface which is formed with a second functional... | 07/29/2008 |
| 7402442 | Physically highly secure multi-chip assembly A physically secure processing assembly is provided that includes dies mounted on a substrate so as to sandwich the electrical contacts of the dies between the dies and the substrate. The substrate is provided with substrate contacts and conductive pathways that are... | 07/22/2008 |
| 7400035 | Semiconductor device having multilayer printed wiring board A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed ... | 07/15/2008 |
| 7397120 | Semiconductor package structure for vertical mount and method In one embodiment, a semiconductor package structure includes a plurality of upright clips having ends with mounting surfaces for vertically mounting the package to a next level of assembly. A semiconductor chip is interposed between the upright clips together with ... | 07/08/2008 |
| 7378733 | Composite flip-chip package with encased components and method of fabricating same Composite flip-chip with encased components and method of fabricating the same is described. One aspect of the invention relates to fabricating composite flip-chip packages for integrated circuit dice. Interposing substrates are formed. At least one discrete compone... | 05/27/2008 |
| 7375421 | High density multilayer circuit module Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit modul... | 05/20/2008 |
| 7368813 | Semiconductor device including semiconductor element surrounded by an insulating member and wiring structures on upper and lower surfaces of the semiconductor element and insulating member, and manufacturing method thereof A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insu... | 05/06/2008 |
| 7361987 | Circuit device with at least partial packaging and method for forming A circuit device (15) is placed within an opening of a conductive layer (10) which is then partially encapsulated with an encapsulant (24) so that the active surface of the circuit device (15) is coplanar with the conductive layer (10 | 04/22/2008 |
| 7358594 | Method of forming a low k polymer E-beam printable mechanical support A low-k interconnect dielectric layer is strengthened by forming pillars of hardened material in the low-k film. An E-beam source is used to expose a plurality of pillar locations. The locations are exposed with a predetermined power and exposure time to convert the... | 04/15/2008 |
| 7352054 | Semiconductor device having conducting portion of upper and lower conductive layers A semiconductor device includes a base plate, at least one first conductive layer carried by the base plate, and a semiconductor constructing body formed on or above the base plate, and having a semiconductor substrate and a plurality of external connecting electrod... | 04/01/2008 |
| 7345359 | Integrated circuit package with chip-side signal connections Embodiments of the present invention include an apparatus, method, and/or system for an integrated circuit package with signal connections on the chip-side of the package structure. ... | 03/18/2008 |
| 7332807 | Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of t... | 02/19/2008 |
| 7291926 | Multi-chip package structure The present invention relates to a multi-chip package structure, comprising a first substrate, a first chip, a sub-package and a first molding compound. The first chip is attached to the first substrate. The first molding compound encapsulates the first chip, the su... | 11/06/2007 |
| 7285862 | Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where... | 10/23/2007 |
| 7274095 | Interposers with receptacles for receiving semiconductor devices and assemblies and packages including such interposers A semiconductor device package interposer including a receptacle extending substantially therethrough. Methods for assembling the interposer with one or more semiconductor devices are also disclosed. A film may be secured to a bottom surface of the interposer so as ... | 09/25/2007 |
| 7256496 | Semiconductor device having adhesion increasing film to prevent peeling A semiconductor device includes at least one semiconductor constructing body provided on one side of a base member, and having a semiconductor substrate and a plurality of external connecting electrodes provided on the semiconductor substrate. An insulating layer is... | 08/14/2007 |
| 7235885 | Semiconductor device and method of manufacturing the same, circuit board and electronic device A semiconductor device includes a wiring board having a wiring pattern, a semiconductor chip that has an integrated circuit and is mounted on a first surface of the wiring board to electrically connect with the wiring pattern, a spacer that is disposed on a second s... | 06/26/2007 |
| 7230332 | Chip package with embedded component A chip package is provided. The chip package includes at least one chip, an interconnection structure, a plurality of second pads and at least one panel-shaped component, wherein the chip includes a plurality of first pads on a surface thereof. The interconnection s... | 06/12/2007 |
| 7230342 | Registration mark within an overlap of dopant regions A first mark, in a double-well integrated circuit technology, is formed by a first etching of a first mask layer on top of an ONO stack. After a first well is doped, a second etching occurs at the first etching sites in the uppermost layer of oxide of the ONO stack ... | 06/12/2007 |
| 7227249 | Three-dimensional stacked semiconductor package with chips on opposite sides of lead A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of t... | 06/05/2007 |
| 7208825 | Stacked semiconductor packages A semiconductor package and a fabrication method thereof are provided in which a chip is mounted on a substrate, and a dielectric layer is applied over the substrate and chip, with bond fingers formed on the substrate and electric contacts formed on the chip being e... | 04/24/2007 |
| 7199459 | Semiconductor package without bonding wires and fabrication method thereof A semiconductor package without bonding wires and a fabrication method are provided. The semiconductor package includes a substrate having a front surface and a back surface, two chips formed on the front surface, two dielectric layers formed on the chips respective... | 04/03/2007 |
| 7196426 | Multilayered substrate for semiconductor device A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connect... | 03/27/2007 |
| 7129583 | Multi-chip package structure The present invention relates to a multi-chip package structure, comprising a first substrate, a first chip, a sub-package and a first molding compound. The first chip is attached to the first substrate. The first molding compound encapsulates the first chip, the su... | 10/31/2006 |
| 7112879 | Microelectronic assemblies having compliant layers A microelectronic package includes a microelectronic element having contacts accessible at a surface thereof, a layer overlying the microelectronic element, the layer having a first surface and a sloping peripheral edge extending away from the first surface of the l... | 09/26/2006 |
| 6704609 | Multi-chip semiconductor module and manufacturing process thereof A multi-chip semiconductor module includes first and second substrates. The first substrate has opposite first and second surfaces, a plurality of first conductive vias that extend through the first and second surfaces, and a first circuit layout patterne... | 03/09/2004 |
| 6690845 | Three-dimensional opto-electronic modules with electrical and optical interconnections and methods for making Three-dimensional opto-electronic modules having a plurality of opto-electronic (O/E) layers, with optical signals being routed between O/E layers within one or more three-dimensional volumes, are disclosed. In preferred embodiments, the O/E layers are di... | 02/10/2004 |
| 6684007 | Optical coupling structures and the fabrication processes An optical apparatus including an optical substrate having an embedded waveguide and an optical device adapted to receive light transmitted from an end of the waveguide. The optical apparatus includes a coupling structure for coupling the optical device t... | 01/27/2004 |
| 6673698 | Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers A thin film semiconductor die circuit package is provided utilizing low dielectric constant (k) polymer material for the insulating layers of the metal interconnect structure. Five embodiments include utilizing glass, glass-metal composite, and glass/glas... | 01/06/2004 |
| 6653168 | LSI package and internal connecting method used therefor The present invention is provides an LSI package without employing steps for forming solder bumps on a bare chip and soldering to an interposer. In the present invention, a bare chip is mounted on the LSI package by forming wiring patterns which connect t... | 11/25/2003 |
| 6639324 | Flip chip package module and method of forming the same A flip-chip package module consists of a semiconductor chip, a heat sink plate, a dielectric layer and a metal interconnect layer. The semiconductor chip has a positive side with a plurality of die pads located thereon and a back side for mounting onto th... | 10/28/2003 |
| 6635510 | Method of making a parylene coating for soldermask A method for making an HDI circuit including backside connections uses parylene as a protective coating. The method includes the steps of: procuring an insulating substrate including an active chip which has exposed electrical or thermal connection(s) on ... | 10/21/2003 |
| 6633081 | Semiconductor device on a packaging substrate A semiconductor device is to be mounted on a packaging substrate. The semiconductor device includes a first semiconductor chip, a plurality of first electrode pads provided on a surface of the first semiconductor chip on a side of the packaging substrate,... | 10/14/2003 |
| 6620731 | Method for fabricating semiconductor components and interconnects with contacts on opposing sides A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and fo... | 09/16/2003 |
| 6613606 | Structure of high performance combo chip and processing method A new method and package for the mounting of semiconductor devices. A silicon substrate serves as the device supporting medium, active semiconductor devices have been created in or on the surface of the silicon substrate. A solder plate is created over th... | 09/02/2003 |
| 6611635 | Opto-electronic substrates with electrical and optical interconnections and methods for making Disclosed is device and/or material integration into thin opto-electronic layers, which increase room for chip-mounting, and reduce the total system cost by eliminating the difficulty of optical alignment between opto-electronic devices and optical wavegu... | 08/26/2003 |
| 6590291 | Semiconductor device and manufacturing method therefor Semiconductor chips having a thickness of 50 μm or so are imbedded and mounted inside a package, such that multi-level stacking is facilitated by providing external connection terminals on both surfaces of the package, or, alternatively, exposing the ter... | 07/08/2003 |
