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System for magnetically attaching templeless eyewear to a person
A system of eyewear that eliminates the need for hinges on the frames of the eyewear.
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| Number | Title | Issue Date |
| 7442641 | Integrated ball and via package and formation process A method of processing a semiconductor device is provided. The method includes providing a semiconductor device supported by a carrier structure. The carrier structure defines a plurality of vias from a first surface of the carrier structure adjacent the semiconduct... | 10/28/2008 |
| 7402442 | Physically highly secure multi-chip assembly A physically secure processing assembly is provided that includes dies mounted on a substrate so as to sandwich the electrical contacts of the dies between the dies and the substrate. The substrate is provided with substrate contacts and conductive pathways that are... | 07/22/2008 |
| 7402904 | Semiconductor device having wires that vary in wiring pitch A semiconductor device includes a first wiring layer having a first wiring pitch and a second wiring layer having a second wiring pitch that differs from the first wiring pitch. The device further includes a third wiring layer which connects the first wiring layer a... | 07/22/2008 |
| 7375421 | High density multilayer circuit module Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit modul... | 05/20/2008 |
| 7368812 | Interposers for chip-scale packages and intermediates thereof A carrier substrate, or interposer, for use in a chip-scale package includes a material, such as a semiconductive material, that has a coefficient of thermal expansion that is the same or similar to that of the semiconductor device to be secured thereto. The interpo... | 05/06/2008 |
| 7361994 | System to control signal line capacitance A system may include a conductive plane defining a non-conductive antipad area and a second non-conductive area extending from the antipad area in at least a first direction, a dielectric plane coupled to the conductive plane, a conductive via passing through the di... | 04/22/2008 |
| 7352052 | Semiconductor device and manufacturing method therefor There is disclosed a semiconductor device comprising at least one semiconductor element, one chip mounting base being provided at least one first interconnection on one major surface thereof and at least one second interconnection on the other major surface thereof,... | 04/01/2008 |
| 7345365 | Electronic component with die and passive device An integrated chip package structure and method of manufacturing the same is by adhering dies on an organic substrate and forming a thin-film circuit layer on top of the dies and the organic substrate. Wherein the thin-film circuit layer has an external circuitry, w... | 03/18/2008 |
| 7342317 | Low coefficient of thermal expansion build-up layer packaging and method thereof A build-up layer packaging comprising a first ceramic substrate, a second ceramic substrate, and a circuit layer is provided. The first ceramic substrate has a through hole to dispose a die therein. The second ceramic substrate, attached to a common lower surface of... | 03/11/2008 |
| 7298035 | Semiconductor device and a method of assembling a semiconductor device A semiconductor device includes a substrate having first and second surfaces, the substrate having an opening; a first adhesive layer provided on the first surface; a second adhesive layer provided under the second surface; a third adhesive layer provided around the... | 11/20/2007 |
| 7291916 | Signal transmission structure and circuit substrate thereof A signal transmission structure suitable for a multi-layer circuit substrate comprising a core layer and at least a dielectric layer is provided. The signal transmission structure according to the present invention comprises a first via landing pad and a reference p... | 11/06/2007 |
| 7276787 | Silicon chip carrier with conductive through-vias and method for fabricating same A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic... | 10/02/2007 |
| 7253505 | IC substrate with over voltage protection function The present invention relates to an IC substrate provided with over voltage protection functions and thus, a plurality of over voltage protection devices are provided on a single substrate to protect an IC chip directly. According to the present invention, there is ... | 08/07/2007 |
| 7230319 | Electronic substrate A substrate for mounting a device is disclosed. The substrate includes at least one transition for providing an RF connection to a lead of the device, the lead extending from a device input to an otherwise free end. The transition comprises two spaced apart electric... | 06/12/2007 |
| 7227249 | Three-dimensional stacked semiconductor package with chips on opposite sides of lead A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of t... | 06/05/2007 |
| 7180180 | Stacked device underfill and a method of fabrication Numerous embodiments of a stacked device underfill and a method of formation are disclosed. In one embodiment, a method of forming stacked semiconductor device with an underfill comprises forming one or more layers of compliant material on at least a portion of the ... | 02/20/2007 |
| 7157372 | Coaxial through chip connection A method performed on a wafer having multiple chips, each including a doped semiconductor and substrate, involves etching an annulus trench partially into the substrate, metalizing the annulus trench with a metal, etching a via trench within the periphery of the ann... | 01/02/2007 |
| 7084513 | Semiconductor device having a plurality of semiconductor chips and method for manufacturing the same A semiconductor device includes a first semiconductor chip (5) having a first terminal (7) on one surface, a second semiconductor chip (1a) which is larger than the first semiconductor chip (5) and on which the first semiconductor ... | 08/01/2006 |
| 6906423 | Mask used for exposing a porous substrate A mask used for exposing a porous substrate to form a first region and a second region, the first region being filled with a conductive material piercing through the entire thickness of the porous substrate to constitute an interfacial conductive portion, the second... | 06/14/2005 |
| 6731189 | Multilayer stripline radio frequency circuits and interconnection methods A multi-layer stripline assembly interconnection includes a first stripline sub-assembly having a first surface and a first plurality of vias disposed in the first surface adapted to receive a plurality of solid metal balls. The interconnection further includes a se... | 05/04/2004 |
| 6610934 | Semiconductor module and method of making the device A multi-chip module including semiconductor devices and a wiring substrate for mounting the semiconductor devices in which the wiring substrate comprises a glass substrate having holes formed by sand blasting and a wiring layer formed on the surface of th... | 08/26/2003 |
| 6603663 | Electronic unit The invention relates to an electronic unit having a mounting board (4) and electronic components (1-3) mounted on it, with the mounting board (4) having metal webs (41) which are embedded in an electrically insulating material (40), the metal webs (41) h... | 08/05/2003 |
| 6594891 | Process for forming multi-layer electronic structures A process of forming a multi-layer electronic composite structure. The process includes providing at least one core including at least one plane of at least one electrically conducting material with a plane of at least one electrically insulating material... | 07/22/2003 |
| 6469375 | High bandwidth 3D memory packaging technique A three-dimensional memory module in a repetitively used pedestal connector provides signal paths unique and common to the module at its level and signal paths from the level below unique to and common to modules at levels above. In order to provide a uni... | 10/22/2002 |
| 6442041 | MCM--MLC technology Disclosed is a multilayer electronics packaging structure, especially for use in a multi chip module. By forming an overlap of signal conductors by the respective mesh conductors, an improved shielding effect is achieved and coupling between signal conduc... | 08/27/2002 |
| 6441479 | System-on-a-chip with multi-layered metallized through-hole interconnection The present invention is directed to a high-performance system on a clip which uses multi-layer wiring/insulation through-hole interconnections to provide short wiring and controlled low-impedance wiring including ground planes and power supply distributi... | 08/27/2002 |
| 6420018 | Low thermal expansion circuit board and multilayer wiring circuit board A low thermal expansion circuit board 1 on which a semiconductor element can be mounted with ease and high reliability, which comprises an insulating layer 3 having an Ni--Fe--based alloy foil or a titanium foil as a core, a wiring conductor 4 on both sid... | 07/16/2002 |
| 6407343 | Multilayer wiring board A wiring layer on which X-directional signal lines 20 to 22 are arranged is formed on a multilayer board. Rectangular power-source conductive patterns 10c are arranged each in which via holes 12c are formed longitudinally or in the wiring direction of the... | 06/18/2002 |
| 6400573 | Multi-chip integrated circuit module A multi-chip integrated circuit module includes a supporting layer of laminate material over which a high-density interconnect structure is formed. The laminate layer includes a first upper laminate layer (10) having a hole (14) disposed therein for recei... | 06/04/2002 |
| 6394281 | Ceramic filter element A process for sealing a ceramic filter by infiltrating a metal into an end of the filter is disclosed. The process includes the steps of contacting the end of a porous ceramic filter with a molten metal, whereby the metal enters into the ceramic matrix to... | 05/28/2002 |
| 6351880 | Method of forming multi-chip module having an integral capacitor element A multi-chip module has an integral capacitor element embedded within the substrate and comprises a plurality of substrate layers forming a multi-chip module substrate. The substrate has a cut edge and forms at the cut edge a bondable edge. A via is forme... | 03/05/2002 |
| 6351026 | Multilayered wiring structure and method of manufacturing the same A multilayered wiring structure includes a lower wiring layer, an interlevel insulating layer, a filling layer, an upper wiring layer, and a plated layer. The lower wiring layer is formed on a lead frame through an insulating layer. The interlevel insulat... | 02/26/2002 |
| 6346317 | Electronic components incorporating ceramic-metal composites The present invention relates to electronic components and in particular relates to ceramic-based electronic components wherein a portion of the component comprises a metal-infiltrated ceramic. In a preferred embodiment, the metal-infiltrated ceramic comp... | 02/12/2002 |
| 6338906 | Metal-infiltrated ceramic seal A metal-infiltrated ceramic for use in tribological applications, such as in mechanical face seals, beatings and other sliding or rubbing components, which provides excellent durability and wear characteristics. The metal-infiltrated ceramic is useful in ... | 01/15/2002 |
| 6339197 | Multilayer printed circuit board and the manufacturing method A multilayer printed wiring board which permits the formation of fine wiring patterns, thereby increasing the density of wiring patterns. Using photosensitive glass having a coefficient of thermal expansion close to that of a copper film as a core substra... | 01/15/2002 |
| 6326561 | Thin-film multilayer wiring board with wiring and via holes in a thickness of an insulating layer A thin-film multilayer wiring board with first and second metallic wiring layers formed on a substrate and an organic insulating layer interposed between the metallic wiring layers. The insulating layer has the first metallic wiring layer and via holes in... | 12/04/2001 |
| 6303877 | Multilayer thin-film wiring board A multilayer thin-film wiring board including a base material provided with a plurality of wiring layers and an insulating layer laminated on the base material, and including a via formed by laminating the wiring layers so as to be provide through the ins... | 10/16/2001 |
| 6300163 | Stacked leads-over-chip multi-chip module A multi-chip module (MCM) and method of manufacturing is disclosed that provides for attachment of semiconductor dice to both sides of the MCM printed circuit board (PCB). Semiconductor dice attached to the top surface of the PCB may be attached by conven... | 10/09/2001 |
| 6286204 | Method for fabricating double sided ceramic circuit boards using a titanium support substrate An integrated double sided metal supported display device has a green tape stack on both sides of the metal support. The green tape stacks incorporate circuitry and conductor filled vias to access the circuitry electrically on each green tape layer. The m... | 09/11/2001 |
| 6274404 | Multilayered wiring structure and method of manufacturing the same A multilayered wiring structure includes a lower wiring layer, an interlevel insulating layer, a filling layer, an upper wiring layer, and a plated layer. The lower wiring layer is formed on a lead frame through an insulating layer. The interlevel insulat... | 08/14/2001 |
