"What can be more palpably absurd than the prospect held out of locomotives traveling twice as fast as stagecoaches?"
The Quarterly Review ; March edition, 1825
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| Number | Title | Issue Date |
| 7391122 | Techniques for flip chip package migration Techniques for integrated circuit packaging in a flip chip configuration that ensures a migration path between related integrated circuits and utilizes core I/O (or area I/O) are provided. An integrated circuit, having a superset of functional circuit elements as co... | 06/24/2008 |
| 7257884 | Method for fabricating semiconductor component with adjustment circuitry for electrical characteristics or input/output configuration A semiconductor component includes adjustment circuitry configured to adjust selected physical and electrical characteristics of the component or elements thereof, and an input/output configuration of the component. The component includes a semiconductor die, a subs... | 08/21/2007 |
| 7126232 | Defect repair apparatus for an electronic device A method is described for repairing failure points, regions or locations in an electronic device to have a perfect function when a semiconductor device including an LCD of other electronic device has defects. Described is a method of transferring a single or multi-l... | 10/24/2006 |
| 7109585 | Junction interconnection structures An integrated circuit device includes a semiconductor substrate having an interlayer insulating layer thereon and a first junction block embedded in the interlayer insulating layer. The first junction block includes a first plurality of conductive junction traces lo... | 09/19/2006 |
| 7007375 | Method for fabricating a semiconductor component A semiconductor component includes adjustment circuitry configured to adjust selected physical and electrical characteristics of the component or elements thereof, and an input/output configuration of the component. The component includes a semiconductor die, a subs... | 03/07/2006 |
| 6809332 | Electronic device and defect repair method thereof A method is described for repairing failure points, regions or locations in an electronic device to have a perfect function when a semiconductor device including an LCD or other electronic device has defects. Described is a method of transferring a single or multi-l... | 10/26/2004 |
| 6686768 | Electrically-programmable interconnect architecture for easily-configurable stacked circuit arrangements Ladder network comprises control terminals including at least ground terminal and master terminal, and slave terminals, each individually connected to ground terminal through fuse elements, respectively. The slave terminals are also sequentially linked, e... | 02/03/2004 |
| 6686659 | Selectable decoupling capacitors for integrated circuit and methods of use Selectable capacitors are used to modify performance characteristics of functional circuit elements of an integrated circuit (IC). In one embodiment, the decoupling capacitors are implemented as additional or alternative mounting pads on a surface of the ... | 02/03/2004 |
| 6676784 | Process for the manufacture of multilayer ceramic substrates A process for the manufacture of a multilayer ceramic substrate includes fabricating the multilayer ceramic substrate from a monolith fabricated from universal layers and a monolith fabricated from custom layers. The universal layer monolith and the custo... | 01/13/2004 |
| 6646342 | Semiconductor chip and multi-chip module A bare-chip IP of a multi-chip module and an external device of the multi-chip module are interfaced with each other through a dedicated I/O bare-chip IP. Each of the bare-chip IPs other than the dedicated I/O bare-chip IP is not provided with an interfac... | 11/11/2003 |
| 6642064 | Method of making a high density programmable logic device in a multichip module package A high performance single package multi-chip module multiplies the logic density of the highest density monolithic programmable logic device (PLD). A dual-sided substrate carries multiple prepackaged PLDs on a top side and a field programmable interconnec... | 11/04/2003 |
| 6627479 | Semiconductor device having a plurality of semiconductor elements interconnected by a redistribution layer A plurality of semiconductor chips are incorporated in a one-piece package so as to substantially increase a mounting area of a semiconductor device so that the semiconductor device can be provided with the projection electrodes having a structure which e... | 09/30/2003 |
| 6617700 | Repairable multi-chip package and high-density memory card having the package Disclosed are a repairable multi-chip package and a high-density memory card having the multi-chip package. The package includes a circuit substrate having bonding tips on a first surface and external contact pads on a second surface opposite to the first... | 09/09/2003 |
| 6614110 | Module with bumps for connection and support An electronic packaging module for inverted bonding of electronic devicss including semiconductor devices, integrated circuits, application specific integrated circuits, electomechanical devices and MEMS is produced with protuberances on the conductive pa... | 09/02/2003 |
| 6590284 | Semiconductor device and method of manufacturing same The invention relates to a semiconductor device (10) comprising an IC (1) which is attached to one side of an insulating substrate (11) which, on said side, is provided with a first conductor pattern (12) to which the connection conductors (4) of the IC (... | 07/08/2003 |
| 6583035 | Semiconductor package with a controlled impedance bus and method of forming same An apparatus includes a first substrate having a set of semiconductor devices formed within it. The apparatus also includes a second substrate. A third substrate has a data conductor coupled between first and second connections to the second substrate. Th... | 06/24/2003 |
| 6552409 | Techniques for addressing cross-point diode memory arrays A memory array and some addressing circuitry therefor are formed by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. The circuit elements formed at the crossi... | 04/22/2003 |
| 6541709 | Inherently robust repair process for thin film circuitry using uv laser A multilayer thin film structure having defined strap repair lines thereon and a method for repairing interconnections in the multilayer thin film structure (MLTF) and/or making engineering changes (EC) are provided. The method determines interconnection ... | 04/01/2003 |
| 6531772 | Electronic system including memory module with redundant memory capability A method and apparatus for repair of a multi-chip module, such as a memory module, is provided, where at least one redundant or auxiliary chip attach location is provided on the substrate of the multi-chip module. The auxiliary chip attach location prefer... | 03/11/2003 |
| 6528735 | Substrate design of a chip using a generic substrate design A method of substrate design of a multilayer ceramic module that uses menu die of the same size. One of these menu die provides a "generic" substrate design having internal wiring with the greatest number of input/output (I/O) signal leads of all the dies... | 03/04/2003 |
| 6521986 | Slot apparatus for programmable multi-chip module This programmable multi-chip module (PMCM) substrate consists of an array of apparatus slots for bare-die attachment and Field Programmable Interconnect Chips (FPICs) for multi-chip module (MCM) substrate routing. A slot apparatus on a PMCM, which allows ... | 02/18/2003 |
| 6506981 | Interconnect structure having fuse or anti-fuse links between profiled apertures An interconnect structure with an interconnect stack consisting of a number of alternating conductive planes and insulating planes. The stack has a number of conductive elements such as conductive vias extend generally normal to the conductive insulating ... | 01/14/2003 |
| 6501157 | Substrate for accepting wire bonded or flip-chip components A semiconductor package assembly is disclosed having a semiconductor die receiving member configured to accept a semiconductor die in either the flip-chip or the wirebond orientations. First contact sites on a die receiving surface provide electrical conn... | 12/31/2002 |
| 6492253 | Method for programming a substrate for array-type packages A programmable substrate and a method of making a programmable substrate for use with array-type packages, including Ball Grid Arrays(BGA), Pin Grid Arrays (PGA) and Column Grid Arrays (CGA) includes a nonconductive programmable substrate with a cavity in... | 12/10/2002 |
| 6486528 | Silicon segment programming apparatus and three terminal fuse configuration The present invention is a method and apparatus for programming a stack of segments wherein each segment includes a plurality of die which are interconnected through metal interconnects patterned on the surface of each segment. Once the segments are arran... | 11/26/2002 |
| 6469377 | Semiconductor device To provide a semiconductor device with a three-dimensional mounting module using a flexible circuit substrate which is easy to assemble a three-dimensional structure and is excellent in the workability in repair work (or re-work). [MEANS FOR SOLUTION] A f... | 10/22/2002 |
| 6449170 | Integrated circuit package incorporating camouflaged programmable elements An integrated circuit package includes at least one one-time programmable element, such as a fuse, having a first end and a second end separated by a programmable link. The programmable element is positioned on a surface other than the top surface, e.g., ... | 09/10/2002 |
| 6444919 | Thin film wiring scheme utilizing inter-chip site surface wiring A thin film wiring scheme on a substrate. The thin film wiring scheme includes a plurality of chip connection pads at each of a first and second chip site on the substrate, a plurality of directional wiring lines interspersed between the chip connection p... | 09/03/2002 |
| 6427324 | Inherently robust repair process for thin film circuitry using UV laser A multilayer thin film structure having defined strap repair lines thereon and a method for repairing interconnections in the multilayer thin film structure (MLTF) and/or making engineering changes (EC) are provided. The method comprises determining inter... | 08/06/2002 |
| 6404660 | Semiconductor package with a controlled impedance bus and method of forming same An apparatus includes a first substrate having a set of semiconductor devices formed within it. The apparatus also includes a second substrate. A third substrate has a data conductor coupled between first and second connections to the second substrate. Th... | 06/11/2002 |
| 6395565 | Multi-chip module system and method of fabrication Multi-chip module systems and method of fabrication thereof wherein the equivalent of a failed die of a multi-chip module (MCM) is added to the module in a vacancy position previously constructed with appropriate electrical connections. A variety of diffe... | 05/28/2002 |
| 6388312 | Repairable multi-chip package A repairable multi-chip package is provided. The repairable multi-chip package comprises a first chip, a second chip, a substrate, and a molding part formed by molding the first chip and the second chip with a molding resin. The substrate comprises a subs... | 05/14/2002 |
| 6388334 | System and method for circuit rebuilding via backside access A circuit modification tool and method for a flip-chip IC permits access to circuit regions near the interconnects using an aperture formed through the circuit side. In one embodiment, an etching tool is adapted to remove substrate from the backside of th... | 05/14/2002 |
| 6380059 | Method of breaking electrically conductive traces on substrate into open-circuited state A method is proposed for use to break integrally-connected electrically-conductive traces on a circuited substrate used in TFBGA (Thin & Fine Ball Grid Array) semiconductor packaging technology, so as to make the electrically-conductive traces open-circui... | 04/30/2002 |
| 6348728 | Semiconductor device having a plurality of semiconductor elements interconnected by a redistribution layer A plurality of semiconductor chips are incorporated in a one-piece package so as to substantially increase a mounting area of a semiconductor device so that the semiconductor device can be provided with the projection electrodes having a structure which e... | 02/19/2002 |
| 6341417 | Pre-patterned substrate layers for being personalized as needed A method and structure for personalizing a multi-layer substrate structure includes supplying a generic layer having electrical features and altering the electrical features to produce a personalized layer of the multi-layer substrate.... | 01/29/2002 |
| 6331221 | Process for providing electrical connection between a semiconductor die and a semiconductor die receiving member A semiconductor package assembly is disclosed having a semiconductor die receiving member configured to accept a semiconductor die in either the flip-chip or the wirebond orientations. First contact sites on a die receiving surface provide electrical conn... | 12/18/2001 |
| 6323045 | Method and structure for top-to-bottom I/O nets repair in a thin film transfer and join process A method and structure for providing top-to-bottom repair of a defective I/O net in a thin film transfer and join process. At least one C4 location and at least one capture pad are provided on a thin film substrate. The substrate is preferably ceramic. Th... | 11/27/2001 |
| 6301121 | Direct-chip-attach (DCA) multiple chip module (MCM) with repair-chip ready site to simplify assembling and testing process The present invention comprises a single-substrate multiple chip module (MCM) assembly. The MCM assembly includes a repair-package-site ready MCM board having a top surface and a bottom surface, the top surface further includes a plurality of chip connect... | 10/09/2001 |
| 6274390 | Method and apparatus providing redundancy for fabricating highly reliable memory modules A method and apparatus for repair of a multi-chip module, such as a memory module, is provided where at least one redundant or auxiliary chip attach location is provided on the substrate of the multi-chip module. The auxiliary chip attach location prefera... | 08/14/2001 |