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| Number | Title | Issue Date |
| 7342301 | Connection device with actuating element for changing a conductive state of a via A connection device includes a plurality of re-configurable vias that connect a first metal layer to a second metal layer. An actuating element is disposed between the first metal layer and the second metal layer. The actuating element changes the configuration of t... | 03/11/2008 |
| 7265437 | Low k dielectric CVD film formation process with in-situ imbedded nanolayers to improve mechanical properties A low k dielectric stack having an effective dielectric constant k, of about 3.0 or less, in which the mechanical properties of the stack are improved by introducing at least one nanolayer into the dielectric stack. The improvement in mechanical properties is achiev... | 09/04/2007 |
| 7176485 | Damascene resistor and method for measuring the width of same A linewidth measurement structure for determining linewidths of damascened metal lines formed in an insulator is provided. The linewidth measurement structure including: a damascene polysilicon line formed in the insulator, the polysilicon line having an doped regio... | 02/13/2007 |
| 6794713 | Semiconductor device and method of manufacturing the same including a dual layer raised source and drain SiGe or SiC films are selectively grown on source/drain regions, followed by selectively growing silicon. A monocrystalline film having a high dislocation density or a polycrystalline film can be grown in growing the silicon film by making the C or Ge concentration ... | 09/21/2004 |
| 6693032 | Method of forming a contact structure having an anchoring portion A semiconductor device adopting an interlayer contact structure between upper and lower conductive layers and a method of manufacturing the semiconductor device adopting the structure are provided. The lower conductive layer includes a first conductive la... | 02/17/2004 |
| 6653229 | Integrated circuit with a recessed conductive layer An improved method for making an integrated circuit. That method includes forming a first dielectric layer on a substrate, etching a trench into that layer, then filling the trench with a conductive material. The conductive material is then electropolishe... | 11/25/2003 |
| 6593653 | Low leakage current silicon carbonitride prepared using methane, ammonia and silane for copper diffusion barrier, etchstop and passivation applications A silicon carbon nitride (SiCN) layer is provided which has a low leakage current and is effective in preventing the migration or diffusion of metal or copper atoms through the SiCN layer. The SiCN layer can be used as a diffusion barrier between a metal ... | 07/15/2003 |
| 6521528 | Semiconductor device and method of making thereof A semiconductor device includes a semiconductor substrate having a first and a second region, a first wiring layer including a lower layer having polycrystal silicon portions including impurities at a high concentration and formed over the first region of... | 02/18/2003 |
| 6506321 | Silicon based conductive material and process for production thereof A silicon based conductive material based on a semiconductor silicon and having an electric resistivity of 10-3 (Ω.multidot.m) or less at ambient temperature which has been unattainable heretofore, while facilitating production and handling. A... | 01/14/2003 |
| 6504224 | Methods and structures for metal interconnections in integrated circuits A typical integrated-circuit fabrication requires interconnecting millions of microscopic transistors and resistors with metal wires. Making the metal wires flush, or coplanar, with underlying insulation requires digging trenches in the insulation, and th... | 01/07/2003 |
| 6476489 | Apparatus and manufacturing method for semiconductor device adopting NA interlayer contact structure A semiconductor device adopting an interlayer contact structure between upper and lower conductive layers and a method of manufacturing the semiconductor device adopting the structure are provided. The lower conductive layer includes a first conductive la... | 11/05/2002 |
| 6468845 | Semiconductor apparatus having conductive thin films and manufacturing apparatus therefor In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of ... | 10/22/2002 |
| 6455942 | Method and apparatus for strapping a plurality of polysilicon lines in a semiconductor integrated circuit device A method and apparatus for partially strapping a plurality of polysilicon lines, each having a first end and second end, uses a metal line having a plurality of spaced apart metal segments that are collinear with each metal segment partially strapping a d... | 09/24/2002 |
| 6444568 | Method of forming a copper diffusion barrier A silicon carbon nitride (SiCN) layer is provided which has a low leakage current and is effective in preventing the migration or diffusion of metal or copper atoms through the SiCN layer. The SiCN layer can be used as a diffusion barrier between a metal ... | 09/03/2002 |
| 6433430 | Contact structure having a diffusion barrier Disclosed is a novel contact structure comprising an underlying layer of titanium silicide, an intermediate layer of titanium boride, and an overlying layer of polysilicon. Also disclosed is a method for forming the contact structure which comprises depos... | 08/13/2002 |
| 6429503 | Connection element in an integrated circuit having a layer structure disposed between two conductive structures A connection element in an integrated circuit having a layer structure disposed between two conductive structures. The layer structure is formed by an insulating layer, which can be destroyed by application of a predetermined voltage, and a silicon layer.... | 08/06/2002 |
| 6429520 | Semiconductor component with silicon wiring and method of fabricating the component A semiconductor component has local silicon wiring. A first silicon region and a second silicon region are doped with dopants of opposite conductivity. The second silicon region is arranged at least partially over the first silicon region and is separated... | 08/06/2002 |
| 6383917 | Method for making integrated circuits An improved method for making an integrated circuit. That method includes forming a first dielectric layer on a substrate, etching a trench into that layer, then filling the trench with a conductive material. The conductive material is then electropolishe... | 05/07/2002 |
| 6346731 | Semiconductor apparatus having conductive thin films In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of ... | 02/12/2002 |
| 6246116 | Buried wiring line A buried wiring line. The structure of the buried wiring line at least comprises a conductive doped region in a provided substrate and a silicon nitride region formed around the conductive doped region in the substrate. The silicon nitride region, which c... | 06/12/2001 |
| 6171950 | Method for forming a multilevel interconnection with low contact resistance in a semiconductor device A method for forming a multilevel interconnection between a polycide layer and a polysilicon layer is disclosed. The multilevel interconnection comprises: forming a first impurity-containing conductive layer on a semiconductor substrate; forming a first s... | 01/09/2001 |
| 6153516 | Method of fabricating a modified polysilicon plug structure A process for forming a modified polysilicon plug structure, used to connect a bit line structure, of a semiconductor memory device, to an underlying source and drain region, of a transfer gate transistor, has been developed. The process features the form... | 11/28/2000 |
| 6121126 | Methods and structures for metal interconnections in integrated circuits A typical integrated-circuit fabrication requires interconnecting millions of microscopic transistors and resistors with metal wires. Making the metal wires flush, or coplanar, with underlying insulation requires digging trenches in the insulation, and th... | 09/19/2000 |
| 6118140 | Semiconductor apparatus having conductive thin films In forming an electrode on a silicon oxide film on a semiconductor substrate through a silicon oxide film, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers. The portion of the gate e... | 09/12/2000 |
| 6087693 | Semiconductor device with reduced stepped portions A first conductive layer and a second conductive layer are formed apart from each other on a surface of a semiconductor substrate. A first contact hole for exposing a surface of first conductive layer is formed in an interlayer insulating film. A first in... | 07/11/2000 |
| 6066895 | Interconnecting structure for semiconductor integrated circuits and method An interconnecting structure for a semiconductor integrated circuit and a method for manufacturing said interconnecting structure. The interconnecting structure comprises a top layer, a bottom layer, and a dielectric isolation layer. The top layer complet... | 05/23/2000 |
| 6043142 | Semiconductor apparatus having conductive thin films and manufacturing apparatus therefor In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of ... | 03/28/2000 |
| 6025265 | Method of forming a landing pad structure in an integrated circuit A method is provided for forming a landing pad of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A plurality of conductive regions are formed over a substrate. A polysilicon landing pad is formed over at least ... | 02/15/2000 |
| 6020641 | Multilevel interconnection with low contact resistance in a semiconductor device A multilevel interconnection between a polycide layer and a polysilicon layer and a method of forming thereof are provided. The multilevel interconnection comprises: a first impurity-containing conductive layer formed on a semiconductor substrate; a first... | 02/01/2000 |
| 6013951 | Semiconductor device having an improved lead connection structure and manufacturing method thereof A first polycide lead, which is formed on a silicon substrate, consists of a first doped polysilicon layer and a first tungsten silicide layer that is formed on the first doped polysilicon layer. An interlayer insulating film, which is formed on the silic... | 01/11/2000 |
| 6001729 | Method of forming wiring structure for semiconductor device A semiconductor device with a contact structure includes a silicon substrate, a diffusion region formed in a surface of the silicon substrate, a silicide film of a high melting point metal deposited on the diffusion region, an insulating film formed on th... | 12/14/1999 |
| 5872385 | Conductive interconnect structure and method of formation In one embodiment, delamination of a patterned silicon nitride anti-reflective layer (26) from an underlying patterned tungsten silicide layer (32), is prevented by forming a thin silicon layer (30) between the patterned tungsten silicide layer (32) and t... | 02/16/1999 |
| 5855993 | Electronic devices having metallurgies containing copper-semiconductor compounds Silicon and germanium containing materials are used at surface of conductors in electronic devices. Solder can be fluxlessly bonded and wires can be wire bonded to these surfaces. These material are used as a surface coating for lead frames for packaging ... | 01/05/1999 |
| 5843842 | Method for manufacturing a semiconductor device having a wiring layer without producing silicon precipitates A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole) and a first conductive layer formed on the insulating... | 12/01/1998 |
| 5838051 | Tungsten policide contacts for semiconductor devices A method for creating manufacturable polycide contacts, for use in advanced semiconductor designs using images as small as 0.35 uM, has been developed. An amorphous silicon film, is used as an underlay, to assist in the growth of an overlying tungsten sil... | 11/17/1998 |
| 5834846 | Semiconductor device with contact structure and method of manufacturing the same A semiconductor device with a contact structure includes a silicon substrate, a diffusion region formed in a surface of the silicon substrate, a silicide film of a high melting point metal deposited on the diffusion region, an insulating film formed on th... | 11/10/1998 |
| 5828130 | Method of forming a landing pad structure in an integrated circuit A method is provided for forming a landing pad of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A plurality of conductive regions are formed over a substrate. A polysilicon landing pad is formed over at least ... | 10/27/1998 |
| 5821590 | Semiconductor interconnection device with both n- and p-doped regions A semiconductor device which can interconnect different types of impurity region without increasing a contact resistance including a first impurity diffusion region formed on a first portion of a semiconductor substrate, a second impurity diffusion region... | 10/13/1998 |
| 5776825 | Method for forming a semiconductor device having reduced stepped portions A first conductive layer and a second conductive layer are formed apart from each other on a surface of a semiconductor substrate. A first contact hole for exposing a surface of first conductive layer is formed in an interlayer insulating film. A first in... | 07/07/1998 |
| 5726479 | Semiconductor device having polysilicon electrode minimization resulting in a small resistance value A polysilicon electrode is formed in an active area surrounded by an isolation on a silicon substrate with a gate oxide film sandwiched therebetween, a polysilicon wire is formed on the isolation, and a source/drain region is formed on both sides of the p... | 03/10/1998 |
