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| Number | Title | Issue Date |
| 7224062 | Chip package with embedded panel-shaped component A bump-less chip package is provided. The bump-less chip package includes a chip, an interconnection structure and a panel-shaped component. The panel-shaped component has a plurality of electrical terminals on a first surface thereof. The back surface of the chip i... | 05/29/2007 |
| 7091615 | Concentration graded carbon doped oxide A process for forming an interlayer dielectric layer is disclosed. The method comprises first forming a carbon-doped oxide (CDO) layer with a first concentration of carbon dopants therein. Next, the CDO layer is further formed with a second concentration of carbon d... | 08/15/2006 |
| 6586822 | Integrated core microelectronic package A microelectronic package including a microelectronic die disposed within an opening in a microelectronic packaging core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic die. Build-up layers... | 07/01/2003 |
| 6548847 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A FIRST WIRING STRIP EXPOSED THROUGH A CONNECTING HOLE, A TRANSITION-METAL FILM IN THE CONNECTING HOLE AND AN ALUMINUM WIRING STRIP THEREOVER, AND A TRANSITION-METAL NITRIDE FILM BETWEEN THE ALUMINUM WIRING STRIP AND THE TRANSITION-METAL FILM Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 04/15/2003 |
| 6388324 | Self-repairing interconnections for electrical circuits A self-repairing interconnection system and methods for forming the system are disclosed. The system includes a metal pathway adjacent a metal-doped chalcogenide material. The system is configured to repair defects in the metal pathway by donating metalli... | 05/14/2002 |
| 6342412 | Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 01/29/2002 |
| 6306762 | Semiconductor device having multi-layered metalization and method of manufacturing the same A semiconductor having multi-layer metalization which has a metal layer between aluminum alloy and metal nitride layers, that prevents failure of interconnects when electromigration causes a discontinuity in the aluminum alloy layer. In a one embodiment, ... | 10/23/2001 |
| 6169324 | Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 01/02/2001 |
| 6143657 | Method of increasing the stability of a copper to copper interconnection process and structure manufactured thereby A via is formed between a copper conductor and a second copper conductor in a thin film electronic device with a copper plug interconnecting the copper conductor and the second copper conductor. Form a stop layer over the first copper conductor and a diel... | 11/07/2000 |
| 6127255 | Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and... | 10/03/2000 |
| 6001461 | Electronic parts and manufacturing method thereof An electronic part comprising an amorphous thin film formed on a substrate; and a metal wiring formed on the surface of the amorphous thin film; wherein an interatomic distance corresponding to a peak of halo pattern appearing in diffraction measurement o... | 12/14/1999 |
| 5939787 | Semiconductor device having a multi-layer contact structure A semiconductor device and manufacturing method thereof having a diffusion barrier layer formed on a semiconductor wafer, whose surface region is provided with a silylation layer, wherein the silylation layer is formed on the diffusion barrier layer which... | 08/17/1999 |
| 5880024 | Semiconductor device having wiring self-aligned with shield structure and process of fabrication thereof A semiconductor integrated circuit device has circuit components, a wiring arrangement electrically connected to the circuit components and a shield structure for preventing signal wirings from a cross-talk between the signal wirings, and the signal wirin... | 03/09/1999 |
| 5811316 | Method of forming teos oxide and silicon nitride passivation layer on aluminum wiring Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 09/22/1998 |
| 5780882 | Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 07/14/1998 |
| 5780869 | Semiconductor integrated circuit means comprising conductive protein on insulating film of calcium phosphate A semiconductor circuit means having an electrode of a conductive protein, cytochrome C and/or mitochondria, which is attached to an insulating film of phosphate, especially calcium phosphate, deposited on a substrate of a silicon monocrystal. A small and... | 07/14/1998 |
| 5739589 | Semiconductor integrated circuit device process for fabricating the same and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 04/14/1998 |
| 5565380 | Semiconductor device and process for production thereof A semiconductor device having an interconnecting line formed of aluminum containing a predetermined additive element, wherein a segregate layer of the additive element is formed along aluminum grain boundaries in the interconnecting line on the basis of a... | 10/15/1996 |
| 5557147 | Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 09/17/1996 |
| 5552341 | Semiconductor device and method for manufacturing the same A semiconductor device and manufacturing method thereof having a diffusion barrier layer formed on a semiconductor wafer. The diffusion barrier layer has a surface region provided with a silylation layer which is formed on the diffusion barrier layer by a... | 09/03/1996 |
| 5481137 | Semiconductor device with improved immunity to contact and conductor defects In a semiconductor device, an impurity diffused layer serving as an active region is formed in a predetermined region of the surface of a semiconductor substrate of silicon, an underlayer insulating film is formed on the semiconductor substrate for the pu... | 01/02/1996 |
| 5430327 | Ohmic contact for III-V semiconductor materials An ohmic contact to a III-V semiconductor material is fabricated. First, a III-V semiconductor material is provided. Source/drain regions are then formed in the III-V semiconductor material. On the III-V semiconductor material, a contact system is formed ... | 07/04/1995 |
| 5420073 | Structure and method for a superbarrier to prevent diffusion between a noble and a non-noble metal This invention relates generally to structure and method for preventing metal diffusion between a noble metal layer and an adjoining non-noble metal layer, and more specifically to new structures and methods for providing a superbarrier structure between ... | 05/30/1995 |
| 5367195 | Structure and method for a superbarrier to prevent diffusion between a noble and a non-noble metal This invention relates generally to structure and method for preventing metal diffusion between a noble metal layer and an adjoining non-noble metal layer, and more specifically to new structures and methods for providing a superbarrier structure between ... | 11/22/1994 |
| 5358616 | Filling of vias and contacts employing an aluminum-germanium alloy A multi-step method of filling submicron vias with aluminum includes an initial deposition of about 1000 angstroms of aluminum which is sputter deposited at a temperature of about 150° C. Subsequently, a layer of an aluminum germanium alloy is deposited,... | 10/25/1994 |
| 5331191 | Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 07/19/1994 |
| 5306946 | Semiconductor device having a passivation layer with silicon nitride layers A semiconductor device is protected by a passivation layer, which includes underlying and overlying silicon nitride layers deposited by the plasma-assisted CVD method by changing layer forming conditions. The silicon nitride layers respectively have their... | 04/26/1994 |
| 5298793 | Semiconductor device including an electrode There is disclosed a semiconductor device having an electrode for wire bonding, comprising a first aluminum layer, a nickel-aluminum alloy layer, and a second aluminum layer. The electrode is suitable for bonding with copper wire, since the electrode with... | 03/29/1994 |
| 5291374 | Semiconductor device having an opening and method of manufacturing the same There is disclosed a semiconductor device having an insulating film formed on a substrate in which a semiconductor element is formed; an electrode pad is formed on the insulating film and is electrically connected to the semiconductor element by a signal ... | 03/01/1994 |
| 5286676 | Methods of making integrated circuit barrier structures A barrier metal integrated circuit structure, including relatively thin, highly nitrided layers of TiW (i.e., TiW:N) straddling a central conductor layer, and in turn each being straddled by adjacent layers of relatively thick substantially un-nitrided Ti... | 02/15/1994 |
| 5275971 | Method of forming an ohmic contact to III-V semiconductor materials An ohmic contact to a III-V semiconductor material is fabricated. First, a III-V semiconductor material is provided. Source/drain regions are then formed in the III-V semiconductor material. On the III-V semiconductor material, a contact system is formed ... | 01/04/1994 |
| 5266516 | Method for making electrical contact through an opening of one micron or less for CMOS technology A new method to produce a contact or via opening and filled metallurgy for integrated circuits. An insulating layer structure is formed over semiconductor device structures. A resist mask with substantially vertical sided openings is formed in the mask ov... | 11/30/1993 |
| 5260604 | Semiconductor device with improved immunity to contact and conductor defects In a semiconductor device, an impurity diffused layer serving as an active region is formed in a predetermined region of the surface of a semiconductor substrate of silicon, an underlayer insulating film is formed on the semiconductor substrate for the pu... | 11/09/1993 |
| 5243221 | Aluminum metallization doped with iron and copper to prevent electromigration Stress induced grain boundary movement in aluminum lines used as connections in integrated circuits is substantially avoided by doping the aluminum with iron. Through this expedient not only is grain boundary movement avoided but electromigration problems... | 09/07/1993 |
| 5202275 | Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 04/13/1993 |
| 5187561 | Metal single crystal line having a particular crystal orientation The close-packed plane of a single crystal forming an electrode line such as electrodes or lines of a semiconductor device whose active regions are reduced in size, i.e., highly integrated, is arranged parallel to the longitudinal direction of the line; o... | 02/16/1993 |
| 5183800 | Interconnection method for semiconductor device comprising a high-temperature superconductive material An interconnecting method for a semiconductor device which includes the steps of depositing a high-temperature superconductive material over an interlevel insulation layer, and irradiating an energy beam onto a high-temperature superconductive material la... | 02/02/1993 |
| 5001108 | Semiconductor device having a superconductive wiring Connecting a superconductive material wiring layer to an electrode formed of normal metals (i.e. non-superconductive metals, such as aluminum), and connecting a part of a semiconductor region to the normal metal. The normal metal can contact the supercond... | 03/19/1991 |
| 4962060 | Making a high speed interconnect system with refractory non-dogbone contacts and an active electromigration suppression mechanism An interconnect (16',18', 18"), whose interlevel contacts comprise refractory (10) to refractory or refractory to semiconductor substrate (13) interfaces, comprises patterned refractory core portions (10), consisting of tungsten or molybdenum, having top ... | 10/09/1990 |
| 4847674 | High speed interconnect system with refractory non-dogbone contacts and an active electromigration suppression mechanism An interconnect (16', 18', 18"), whose interlevel contacts comprise refractory (10) to refractory or refractory to semiconductor substrate (13) interfaces, comprises patterned refractory core portions (10), consisting of tungsten or molybdenum, having top... | 07/11/1989 |
