Actor Zeppo Marx patented a "Cardiac Pulse Rate Monitor" in 1969.
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| Number | Title | Issue Date |
| 7442626 | Rectangular contact used as a low voltage fuse element A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse elements. In one embodiment, the fuse element is constructed with a rectangular-shaped contact. The contac... | 10/28/2008 |
| 7439538 | Multi-purpose poly edge test structure A test structure in accordance with the present invention allows for testing of both Vbd TDDB, and leakage current between adjacent gate features. The test structure comprises a plurality of parallel polysilicon gate structures overlying a substrate. Trac... | 10/21/2008 |
| 7402887 | Semiconductor device having fuse area surrounded by protection means A semiconductor device has a semiconductor substrate, first and second insulating layers, a fuse, a diffusion layer and a conductive pattern. The first insulating layer is selectively formed on a surface of the semiconductor substrate. The fuse is formed on the firs... | 07/22/2008 |
| 7391097 | Secure electrically programmable fuse The present invention provides electrically-programmable fuse structures having radiation inhibitive properties for preventing non-destructive security breaches by radiation imaging techniques such as X-ray imaging, without adversely effecting fuse programmability, ... | 06/24/2008 |
| 7388273 | Reprogrammable fuse structure and method A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material... | 06/17/2008 |
| 7382036 | Doped single crystal silicon silicided eFuse An eFuse begins with a single crystal silicon-on-insulator (SOI) structure that has a single crystal silicon layer on a first insulator layer. The single crystal silicon layer is patterned into a strip. Before or after the patterning, the single crystal silicon laye... | 06/03/2008 |
| 7361967 | Semiconductor device with fuse wires and connection wires A semiconductor device wherein return wires corresponding to a plurality of fuse wires are arranged collectively in the same region. Moreover, the return wires are arranged in multiple layers. This arrangement creates a region where no return wire is disposed betwee... | 04/22/2008 |
| 7354805 | Method of making electrically programmable fuse for silicon-on-insulator (SOI) technology A fuse structure and method of forming the same is described, wherein the body of the fuse is formed from a crystalline semiconductor body on an insulator, preferably of a silicon-on-insulator wafer, surrounded by a fill-in dielectric. The fill-in dielectric is pref... | 04/08/2008 |
| 7352050 | Fuse region of a semiconductor region In a fuse region of a semiconductor device, and a method of fabricating the same, the fuse region includes an interlayer insulating layer on a semiconductor substrate, a plurality of fuses on the interlayer insulating layer disposed in parallel with each other, a bl... | 04/01/2008 |
| 7342291 | Standby current reduction over a process window with a trimmable well bias An integrated circuit device including a plurality of MOSFETs of similar type and geometry is formed on a substrate with an ohmic contact, and an adjustable voltage source on the die utilizing clearable fuses is coupled between the ohmic contact and the sources of t... | 03/11/2008 |
| 7323760 | Fuse structure for semiconductor integrated circuit with improved insulation film thickness uniformity and moisture resistance When the film thickness of an insulating film on a fuse connected to a circuit is not uniform within a wafer surface, there was a problem that disconnection of the fuse might become insufficient due to the insufficient intensity of a laser or disconnection of even a... | 01/29/2008 |
| 7291902 | Chip component and method for producing a chip component A chip component (1) includes a semiconductor body (2), in which at least one switchable element (6, 62) is arranged in a partial region (24) of the semiconductor body (2). The partial region (24) can be reached by light of ... | 11/06/2007 |
| 7241646 | Semiconductor device having voltage output function trim circuitry and method for same In accordance with the teachings of the present invention, a semiconductor device having voltage output function trim circuitry and a method for the same are provided. In a particular embodiment, the method includes electrically coupling to a main circuit of a semic... | 07/10/2007 |
| 7242072 | Electrically programmable fuse for silicon-on-insulator (SOI) technology A fuse structure and method of forming the same is described, wherein the body of the fuse is formed from a crystalline semiconductor body on an insulator, preferably of a silicon-on-insulator wafer, surrounded by a fill-in dielectric. The fill-in dielectric is pref... | 07/10/2007 |
| 7239004 | Semiconductor device having fuse and capacitor at the same level and method of fabricating the same In a semiconductor device and a method of fabricating the same, a fuse and a capacitor are formed at a same level on a semiconductor substrate having a fuse area and a capacitor area. The fuse is placed on the fuse area, and a lower plate is placed on the capacitor ... | 07/03/2007 |
| 7235872 | Bow control in an electronic package A package including a package substrate, a die-substrate assembly including a substrate including a plurality of layers including a layer having a mesh to stiffen the substrate adapted to mount one or more dice, one or more dice mounted on the substrate and a moldin... | 06/26/2007 |
| 7235859 | Arrangement and process for protecting fuses/anti-fuses An arrangement for protecting fuses/anti-fuses on chips which serve to activate redundant circuits or chip functions includes a passivation layer (e.g., hard passivation) arranged on a fully processed chip with the exception of metal contacts of a metallization leve... | 06/26/2007 |
| 7208781 | Semiconductor device having fuses A semiconductor device which includes fuses for relieving defective areas in the semiconductor device is described. There is provided a semiconductor device including a semiconductor substrate having a circuit element, an insulating layer provided on the semiconduct... | 04/24/2007 |
| 7193292 | Fuse structure with charge protection circuit A fuse structure for memory cell repair in a RAM device. The fuse structure includes a substrate, a fuse layer over an isolation region on the substrate, a charge protection circuit electrically connected to one side of the fuse layer, and two conductive layers over... | 03/20/2007 |
| 7190044 | Fuse structure for a semiconductor device A fuse structure for a semiconductor device is provided. The fuse structure includes a fuse layer between the upper and bottom insulating layers. The fuse layer is connected to the other metal layers through via plugs. The fuse layer includes separate blocks and at ... | 03/13/2007 |
| 7176551 | Fuse structure for a semiconductor device A fuse structure for a semiconductor device is provided. The fuse structure includes a fuse layer between the upper and lower insulating layers. The fuse layer is connected to the other metal layers through the via plugs. The fuse layer includes at least two separat... | 02/13/2007 |
| 7154160 | Semiconductor fuse box and method for fabricating the same A semiconductor fuse box includes a fuse structure and a protective structure disposed between the fuse structure and an integrated circuit structure. The protective structure has at least one irregular side surface. The protective structure (which may also include ... | 12/26/2006 |
| 7098534 | Sacrificial component A device includes a substrate. The substrate further includes a first major surface including a plurality of lands, and a second major surface. At least one component is attached to at least some of the plurality of pads on the first major surface. At least one sacr... | 08/29/2006 |
| 7042065 | Semiconductor device and method of manufacturing the same A semiconductor device includes a semiconductor substrate, an insulating film, and a fuse element. The semiconductor substrate includes main and back surfaces and a trimming opening penetrating therethrough from the back surface to the main surface. The insulating f... | 05/09/2006 |
| 6946718 | Integrated fuse for multilayered structure A device includes a substrate and a first layer disposed adjacent the substrate. A second layer is disposed adjacent the first layer. A third layer contains a gap and is disposed adjacent the second layer. A fuse is electrically coupled to the third layer and is loc... | 09/20/2005 |
| 6887785 | Etching openings of different depths using a single mask layer method and structure A semiconductor device with openings of differing depths in a substrate or layer is described, as are related methods for its manufacture. Through selective deposition of a single mask layer, whereby low aspect ratio openings are substantially coated while high aspe... | 05/03/2005 |
| 6809397 | Fuse boxes with guard rings for integrated circuits and integrated circuits including the same Integrated circuit devices and fuse boxes have a fuse line at a fuse portion of the integrated circuit device and a first insulating layer on the fuse line. A first guard ring pattern is provided that encloses the fuse line on the first insulating layer and a second... | 10/26/2004 |
| 6753210 | Metal fuse for semiconductor devices A method of forming a metal fuse comprising the following steps. A structure is provided having exposed adjacent metal structures. A patterned dielectric layer is formed over the structure. The patterned dielectric layer having via openings 2exposing at least a port... | 06/22/2004 |
| 6703680 | Programmable element programmed by changes in resistance due to phase transition A programmable element includes a resistive element having a polysilicon film and a metal silicide film or metal film stacked on the polysilicon film. The electric resistance of the resistive element is changed by changing the composition of the metal sil... | 03/09/2004 |
| 6700161 | Variable resistor structure and method for forming and programming a variable resistor for electronic circuits A non-ablative structure and method for forming a variable resistor includes providing a programmable resistive element including two or more different conductive materials, and changing a resistance of the programmable resistive element to a finite value... | 03/02/2004 |
| 6696714 | Multichip semiconductor device having a hip with redundancy restoration fuse that affects a redundant memory array A multichip semiconductor device with an improved yield and a reduced inspection cost is provided in which a fuse is provided on a first semiconductor chip while a fuse is not provided on a second semiconductor chip as a rewritable memory, and these chips... | 02/24/2004 |
| 6692994 | Method for manufacturing a programmable chalcogenide fuse within a semiconductor device A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on ... | 02/17/2004 |
| 6693819 | High voltage switch circuitry The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable memory device using such a high voltage switch. The memory device includes a plurality of one... | 02/17/2004 |
| 6686768 | Electrically-programmable interconnect architecture for easily-configurable stacked circuit arrangements Ladder network comprises control terminals including at least ground terminal and master terminal, and slave terminals, each individually connected to ground terminal through fuse elements, respectively. The slave terminals are also sequentially linked, e... | 02/03/2004 |
| 6680519 | Integrated circuitry fuse forming methods, integrated circuitry programming methods, and related integrated circuitry Integrated circuitry fuse forming methods, integrated circuitry programming methods, and related integrated circuitry are described. In one implementation, a first layer comprising a first conductive material is formed over a substrate. A second layer com... | 01/20/2004 |
| 6680520 | Method and structure for forming precision MIM fusible circuit elements using fuses and antifuses The present invention describes an apparatus and method for fabrication of a precision circuit elements. In particular, the circuit elements are fabricated as part of an integrated circuit assembly. The processing of the circuit elements is such to provid... | 01/20/2004 |
| 6670824 | Integrated polysilicon fuse and diode An integrated polysilicon fuse and diode and methods of making the same are provided. The integrated polysilicon fuse and diode combination may be implemented in a programmable cross point fuse array. The integrated polysilicon fuse and diode may be used ... | 12/30/2003 |
| 6671205 | Low voltage non-volatile memory cell A memory cell comprises a multilayer gate heating structure formed over a channel region between source and drain regions. The multilayer gate heating structure comprises polysilicon and metal silicide layers stacked over a similarly shaped gate oxide. Wh... | 12/30/2003 |
| 6667533 | Triple damascene fuse Disclosed is a conductive fuse for a semiconductor device, comprising: a pair of contact portions integrally connected to a fusible portion by connecting portions; the contact portions thicker than the connecting portions and the connecting portions thick... | 12/23/2003 |
| 6667537 | Semiconductor devices including resistance elements and fuse elements A semiconductor device may have an insulating layer comprising a silicon oxide film or the like formed so as to cover an entire upper surface of a semiconductor substrate. A resistance element comprising MoSix is formed on the insulating layer.... | 12/23/2003 |