Did You Know...
...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Number | Title | Issue Date |
| 7405463 | Gate dielectric antifuse circuit to protect a high-voltage transistor According to embodiments of the present invention, circuits have elements to protect a high-voltage transistor in a gate dielectric antifuse circuit. An antifuse has a layer of gate dielectric between a first terminal coupled to receive an elevated voltage and a sec... | 07/29/2008 |
| 7402463 | Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application An anti-fuse structure that included a buried electrically conductive, e.g., metallic layer as an anti-fuse material as well as a method of forming such an anti-fuse structure are provided. According to the present invention, the inventive anti-fuse structure compri... | 07/22/2008 |
| 7358589 | Amorphous carbon metal-to-metal antifuse with adhesion promoting layers A metal-to-metal antifuse having a lower metal electrode, a lower thin adhesion promoting layer disposed over the lower metal electrode, an amorphous carbon antifuse material layer disposed over the thin adhesion promoting layer, an upper thin adhesion promoting lay... | 04/15/2008 |
| 7351613 | Method of trimming semiconductor elements with electrical resistance feedback A method of trimming down the volume of a semiconductor resistor element using electrical resistance feedback. After forming conductive material disposed between a pair of electrodes, a voltage is applied to the electrodes to produce an electrical current through th... | 04/01/2008 |
| 7329911 | Semiconductor device including memory cell and anti-fuse element A semiconductor device includes an anti-fuse portion and a memory cell portion each including a MOSFET structure having a gate insulating film formed on a semiconductor substrate and a gate electrode formed on the gate insulating film; wherein a depletion ratio in t... | 02/12/2008 |
| 7323761 | Antifuse structure having an integrated heating element The present invention provides antifuse structures having an integrated heating element and methods of programming the same, the antifuse structures comprising first and second conductors and a dielectric layer formed between the conductors, where one or both of the... | 01/29/2008 |
| 7319053 | Vertically stacked field programmable nonvolatile memory and method of fabrication A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus ... | 01/15/2008 |
| 7301216 | Fuse structure A metal layer structure is disclosed. The metal layer structure includes a substrate, a first dielectric layer on a surface of the substrate, and at least one first conductor and at least one second conductor on the first dielectric layer. The second conductor has a... | 11/27/2007 |
| 7256471 | Antifuse element and electrically redundant antifuse array for controlled rupture location An antifuse element (102) having end corners (120, 122) of a gate electrode (104) positioned directly above an active area (106) or bottom electrode. The minimum programming voltage between the gate electrode (104) and the active a... | 08/14/2007 |
| 7253496 | Antifuse circuit with current regulator for controlling programming current In one embodiment, an antifuse cell includes a select transistor, a blocking transistor, and an antifuse. The select transistor allows for selection of the antifuse cell among an array of antifuse cells, while the blocking transistor limits the amount of voltage tha... | 08/07/2007 |
| 7226816 | Method of forming connection and anti-fuse in layered substrate such as SOI An anti-fuse structure that can be programmed at low voltage and current and which potentially consumes very little chip spaces and can be formed interstitially between elements spaced by a minimum lithographic feature size is formed on a composite substrate such as... | 06/05/2007 |
| 7206215 | Antifuse having tantalum oxynitride film and method for making same A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen is introduced to form a tantalum oxynitride film. A top plate electro... | 04/17/2007 |
| 7176065 | Magnetic tunneling junction antifuse device An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least s... | 02/13/2007 |
| 7148503 | Semiconductor device, function setting method thereof, and evaluation method thereof The present invention provides a semiconductor device, in which a plurality of chip IPs are mounted onto a common semiconductor circuit board, an evaluation method for the same, and a function setting method for the same. Various IP groups can be mounted as chip IPs... | 12/12/2006 |
| 7071534 | Antifuse structure and method of use An antifuse structure and method of use are disclosed. According to one embodiment of the present invention a first programming voltage is coupled to a well of a first conductivity type in a substrate of a second conductivity type in an antifuse. A second programmin... | 07/04/2006 |
| 6919613 | Magnetic tunneling junction antifuse device An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least s... | 07/19/2005 |
| 6700161 | Variable resistor structure and method for forming and programming a variable resistor for electronic circuits A non-ablative structure and method for forming a variable resistor includes providing a programmable resistive element including two or more different conductive materials, and changing a resistance of the programmable resistive element to a finite value... | 03/02/2004 |
| 6700176 | MOSFET anti-fuse structure and method for making same An anti-fuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A channel is formed between the source and drain regions. A gate and gate oxide are formed on the channel and lightly doped source and drain ex... | 03/02/2004 |
| 6686768 | Electrically-programmable interconnect architecture for easily-configurable stacked circuit arrangements Ladder network comprises control terminals including at least ground terminal and master terminal, and slave terminals, each individually connected to ground terminal through fuse elements, respectively. The slave terminals are also sequentially linked, e... | 02/03/2004 |
| 6680520 | Method and structure for forming precision MIM fusible circuit elements using fuses and antifuses The present invention describes an apparatus and method for fabrication of a precision circuit elements. In particular, the circuit elements are fabricated as part of an integrated circuit assembly. The processing of the circuit elements is such to provid... | 01/20/2004 |
| 6677220 | Antifuse structure and method of making An antifuse structure has an antifuse between first and second thermal conduction regions. Each of the first and second thermal conduction regions has a portion of low thermal conductivity and a portion of high thermal conductivity. The portion having low... | 01/13/2004 |
| 6664639 | Contact and via structure and method of fabrication The present invention is a contact/via comprising and its method of fabrication. The contact/via of the present invention includes a conductive film. An opening having a top and bottom is formed on the conductive film. The opening has a first sidewall and... | 12/16/2003 |
| 6657278 | Diverse band gap energy level semiconductor device Hetero-structure semiconductor devices having first and second-type semiconductor junctions are disclosed. The hetero-structures are incorporated into pillar and rail-stack memory circuits improving the forward-to-reverse current ratios thereof.... | 12/02/2003 |
| 6657277 | Method for forming antifuse via structure The present invention provides a method for forming an antifuse via structure. The antifuse via structures comprising a substrate that having a first conductive wire therein. Then, a first dielectric layer is formed on the substrate, and a photoresist lay... | 12/02/2003 |
| 6653193 | Resistance variable device A resistance variable device and a method for using the same. The device includes a body formed of a voltage or current controlled resistance setable material, and at least two spaced electrodes on the body. The body includes a surface extending from one ... | 11/25/2003 |
| 6638794 | Method for fabricating an anti-fuse in programmable interconnections The present invention includes forming a first conductive layer in a first dielectric layer, followed by forming a second dielectric layer on the first dielectric layer. The second dielectric layer is patterned to form openings on the second dielectric la... | 10/28/2003 |
| 6633183 | Antifuse reroute of dies A circuit is provided with a programmable switching matrix incorporating at least one antifuse to selectively route signal paths. The selective routing of signal paths may be used for example, to internally reroute contact pin assignments on semiconductor... | 10/14/2003 |
| 6630724 | Gate dielectric antifuse circuits and methods for operating same A number of antifuse support circuits and methods for operating them are disclosed according to embodiments of the present invention. An external pin is coupled to a common bus line in an integrated circuit to deliver an elevated voltage to program antifu... | 10/07/2003 |
| 6627970 | Integrated semiconductor circuit, in particular a semiconductor memory circuit, having at least one integrated electrical antifuse structure, and a method of producing the structure An integrated semiconductor circuit, in particular a semiconductor memory circuit, having at least one integrated electrical antifuse structure is described. The antifuse structure is located within an insulated well composed of semiconductor material.... | 09/30/2003 |
| 6627969 | Metal-to-metal antifuse having improved barrier layer A metal-to-metal conductive plug-type antifuse has a conductive plug disposed in an opening in an insulating layer. A programmable material feature (for example, amorphous silicon) overlies the conductive plug. A conductor involving a metal (for example, ... | 09/30/2003 |
| 6624031 | Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure A method for detecting semiconductor process stress-induced defects. The method comprising: providing a polysilicon-bounded test diode, the diode comprising a diffused first region within an upper portion of a second region of a silicon substrate, the sec... | 09/23/2003 |
| 6621138 | Zener-like trim device in polysilicon A semiconductor device includes a polysilicon layer in which a first region of a first conductivity type and a second region of a second conductivity type is formed. The first region and the second region form a p-n junction in the polysilicon layer. The ... | 09/16/2003 |
| 6621324 | Redundant antifuse segments for improved programming efficiency An antifuse structure for improved programming efficiency is disclosed wherein the antifuse structure including a first node providing a first voltage, a plurality of antifuse elements, and a plurality of first switches. The plurality of antifuse elements... | 09/16/2003 |
| 6617233 | Process of fabricating an anti-fuse for avoiding a key hole exposed A process of forming an anti-fuse. First, an inter-metal dielectric layer, in which a funnel-shaped via is formed, is formed on a substrate. Next, a first conductive layer is formed over the substrate and filled into the funnel-shaped via. Subsequently, b... | 09/09/2003 |
| 6611040 | Anti-fuse structure of writing and reading in integrated circuits An information write-register embedded in an integrated circuit (IC) is made of a plurality of independently addressable gate-controlled components formed in an isolated p-well nested in a n-well. Gates over the p-well are positioned on an insulator geome... | 08/26/2003 |
| 6611039 | Vertically oriented nano-fuse and nano-resistor circuit elements Vertically oriented nano-circuits including fuses and resistors allow for significant densities to be achieved. The vertically oriented nano-circuits can be fabricated using standard known processes such as Damascene, wet etching, reactive etching, etc. T... | 08/26/2003 |
| 6608355 | Semiconductor integrated circuit having anti-fuse, method of fabricating, and method of writing data in the same A semiconductor integrated contains a first MOS transistor of a first conductivity type formed on a surface of a semiconductor substrate, and a second MOS transistor of the first conductivity type having a drain-source breakdown voltage lower than that of... | 08/19/2003 |
| 6603142 | Antifuse incorporating tantalum nitride barrier layer A metal-to-metal antifuse disposed above and insulated from a semiconductor substrate comprises a first metal layer disposed above and insulated from the semiconductor substrate. A layer of antifuse material is disposed over and in electrical contact with... | 08/05/2003 |
| 6603187 | Antifuse structure suitable for VLSI application The present invention relates to a high performance, high reliability antifuse using conductive electrodes. According to first and second embodiments, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing conductive electrod... | 08/05/2003 |
| 6597234 | Anti-fuse circuit and method of operation An anti-fuse useful in implementing redundancy in a memory utilizes a normal transistor characteristic that is generally considered undesirable in order to provide two easily detected states. The un-programmed state, which is the high impedance state, is ... | 07/22/2003 |
