Did You Know...
...that to encourage use of his new invention, the shopping cart, market owner Sylvan Goldman hired fake shoppers to push the carts around his store in Oklahoma City? Seems his customers were reluctant to give up their hand-carried baskets.
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| Number | Title | Issue Date |
| 7423346 | Post passivation interconnection process and structures A system and method for forming post passivation metal structures is described. Metal interconnections and high quality electrical components, such as inductors, transformers, capacitors, or resistors are formed on a layer of passivation, or on a thick layer of poly... | 09/09/2008 |
| 7414312 | Memory-module board layout for use with memory chips of different data widths A memory module substrate printed-circuit board (PCB) has multi-type footprints and an edge connector for mating with a memory module socket on a motherboard. Two or more kinds of dynamic-random-access memory (DRAM) chips with different data I/O widths can be solder... | 08/19/2008 |
| 7411259 | Wiring material and a semiconductor device having a wiring using the material, and the manufacturing method thereof An object of the present invention is to realize a semiconductor device having a high TFT characteristic. In manufacturing an active matrix display device, electric resistivity of the electrode material is kept low by preventing penetration of oxygen ion into the el... | 08/12/2008 |
| 7411302 | Semiconductor device and a method of manufacturing the same and designing the same There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be place... | 08/12/2008 |
| 7405455 | Semiconductor constructions and transistor gates One aspect of the invention encompasses a method of forming a semiconductor structure. A patterned line is formed to comprise a first layer and a second layer. The first layer comprises silicon and the second layer comprises a metal. The line has at least one sidewa... | 07/29/2008 |
| 7405485 | Semiconductor device A semiconductor device provided with a first semiconductor chip having a first functional surface formed with a first functional element and a first rear surface, a second semiconductor chip having a second functional surface which is formed with a second functional... | 07/29/2008 |
| 7400038 | Semiconductor device, substrate, equipment board, method for producing semiconductor device, and semiconductor chip for communication A semiconductor device includes a first substrate having a first surface for mounting an electronic component and a second surface substantially parallel to the first surface. The first substrate includes a first region for mounting the electronic component, a secon... | 07/15/2008 |
| 7385287 | Preventing damage to low-k materials during resist stripping A method of forming a feature in a low-k dielectric layer is provided. A low-k dielectric layer is placed over a substrate. A patterned photoresist mask is placed over the low-k dielectric layer. At least one feature is etched into the low-k dielectric layer. A CO c... | 06/10/2008 |
| 7361979 | Multi-sheet conductive substrates for microelectronic devices and methods for forming such substrates A substrate is provided having a plurality of sheets. Each sheet has a first major surface containing a plurality of electrically conductive regions and a second major surface that opposes the first major surface. The sheets are arranged such that the first major su... | 04/22/2008 |
| 7361984 | Chip package structure A chip package structure including a lead frame, at least one first bonding wire, at least one second bonding wire, third bonding wires and an encapsulant is provided. The lead frame includes a die pad, inner leads and at least one bus bar, wherein the bus bar is di... | 04/22/2008 |
| 7342295 | Porogen material A porogen material for forming a dielectric porous film. The porogen material may include a silicon based dielectric precursor and a silicon containing porogen. The porous film may have a substantially uniform dielectric constant value throughout. Methods of forming... | 03/11/2008 |
| 7339265 | Capacitance type semiconductor sensor In a capacitance type semiconductor dynamic quantity sensor, a sensor chip and a circuit are connected to each other through adhesive film having an elasticity of 200 MPa or less to reduce the temperature characteristic. Four bonding wires for connecting the sensor ... | 03/04/2008 |
| 7332428 | Metal interconnect structure and method In a method of fabricating a semiconductor device, a dielectric layer is formed over a conductive region. A dual damascene structure including a trench and a via is formed within the dielectric layer. A liner is formed over the dual damascene structure. The liner is... | 02/19/2008 |
| 7329943 | Microelectronic devices and methods for forming interconnects in microelectronic devices Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backs... | 02/12/2008 |
| 7327033 | Copper alloy via bottom liner Improved mechanical and adhesive strength and resistance to breakage of copper integrated circuit interconnections is obtained by forming a copper alloy in a copper via/wiring connection in an integrated circuit while minimizing adverse electrical effects of the all... | 02/05/2008 |
| 7294899 | Nanowire Filament A method of manufacturing a nanowire filament includes forming and fusing actions. In a forming action, close proximity conductors are formed. In another forming action, a junction oxide is formed between the close proximity conductors. In a fusing action, a nanowir... | 11/13/2007 |
| 7285855 | Packaged device and method of forming same A method of packaging an integrated circuit die (12) includes the steps of loading an array of soft conductive balls into recesses formed in a platen and locating the platen in a first part of a mold cavity. A second part of the mold is pressed against the ba... | 10/23/2007 |
| 7282434 | Method of manufacturing a semiconductor device A method of manufacturing a semiconductor integrated circuit device is provided including forming a first insulating film comprised of fluorine-containing silicon oxide over a main surface of a semiconductor substrate is formed together with forming a second insulat... | 10/16/2007 |
| 7279783 | Partitioned integrated circuit package with central clock driver Disclosed are IC partitioned packaging and interconnection constructions that provide for improved distribution of power, ground, cross chip interconnections and clocks. ... | 10/09/2007 |
| 7245016 | Circuit layout structure A circuit layout structure for a chip is provided. The chip has a bonding pad area, a nearby device area, and a substrate. The circuit layout structure essentially comprises a plurality of circuit layers, a plurality of dielectric layers and a plurality of vias. The... | 07/17/2007 |
| 7233070 | Semiconductor device having no cracks in one or more layers underlying a metal line layer and method of manufacturing the same A semiconductor device and a method of manufacturing the same which yields high reliability and a high manufacturing yield. The semiconductor device includes a metal line layer having a plurality of metal line patterns spaced apart from each other, and at least one ... | 06/19/2007 |
| 7217653 | Interconnects forming method and interconnects forming apparatus The present invention provides an interconnects-forming method and an interconnects-forming apparatus which can minimize the lowering of processing accuracy in etching, minimize light exposure processing for the formation of interconnect recesses in the production o... | 05/15/2007 |
| 7211503 | Electronic devices fabricated by use of random connections Embodiments of the present invention are directed to methods for fabricating microscale-to-nanoscale interfaces. In numerous embodiments of the present invention, hybrid microscale/nanoscale crossbar multiplexers/demultiplexers provide for selection and control of i... | 05/01/2007 |
| 7208404 | Method to reduce Rs pattern dependence effect A method of forming a copper interconnect in an opening within a pattern is described. The copper interconnect has an Rs that is nearly independent of opening width and pattern density. A first copper layer having a concave upper surface and thickness t1 ... | 04/24/2007 |
| 7187015 | High-density metal capacitor using dual-damascene copper interconnect An electronic structure having a first conductive layer provided by a dual damascene fabrication process; an etch-stop layer provided by the fabrication process, and electrically coupled with the first conductive layer, the etch-stop layer having a preselected diele... | 03/06/2007 |
| 7161183 | Liquid crystal display and method of manufacturing the same A method of manufacturing a liquid crystal display device is intended to decrease the number of manufacturing steps. The liquid crystal display device is arranged so that in each pixel area provided on a liquid-crystal-side surface of one of a pair of substrates dis... | 01/09/2007 |
| 7145246 | Method of fabricating an ultra-narrow channel semiconductor device A method of forming a nanowire is disclosed. A nanowire having a first dimension is deposited on a first dielectric layer that is formed on a substrate. A sacrificial gate stack having a sacrificial dielectric layer and a sacrificial gate electrode layer is deposite... | 12/05/2006 |
| 7119424 | Semiconductor device and method for manufacturing the same A semiconductor device (21) can include, e.g., a recessed portion (25) on the reverse surface (224) of an insulating resin (22) which is the mounting surface of the semiconductor device (21). Additionally, on the outer peripheral s... | 10/10/2006 |
| 7078729 | Semiconductor device and method of manufacturing the same A semiconductor device includes a substrate, and a semiconductor thin film bonded to the substrate, wherein the semiconductor thin film includes a plurality of discrete operating regions and an element isolating region which isolates the plurality of discrete operat... | 07/18/2006 |
| 7071560 | Semiconductor device and a method of manufacturing the same and designing the same There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be place... | 07/04/2006 |
| 6687842 | Off-chip signal routing between multiply-connected on-chip electronic elements via external multiconductor transmission line on a dielectric element A semiconductor chip is provided with a dielectric element having conductive features interconnecting electronic elements within the chip with one another. The conductive features replace internal conductors, and can provide enhanced signal propagation be... | 02/03/2004 |
| 6674177 | Apparatus for implementing selected functionality on an integrated circuit device A semiconductor device in a computer system is disclosed that includes a die having an active surface bearing integrated circuitry, the die including a plurality of bond pads thereon at least some of which are connected to the integrated circuitry and hav... | 01/06/2004 |
| 6635560 | Method for implementing selected functionality on an integrated circuit device A semiconductor device in a computer system is described that includes a die having an active surface bearing integrated circuitry, the die including a plurality of bond pads thereon at least some of which are connected to the integrated circuitry and hav... | 10/21/2003 |
| 6621171 | Semiconductor device having a wire laid between pads It is intended to lower an increase of an area of an unused area or a wiring area, which is caused due to addition or enhancement of a particular function of a semiconductor device without significantly changing layout of the semiconductor device which ha... | 09/16/2003 |
| 6617692 | Apparatus for implementing selected functionality on an integrated circuit device A semiconductor device in a computer system is disclosed that includes a die having an active surface bearing integrated circuitry, the die including a plurality of bond pads thereon connected to the integrated circuitry. At least one electrically conduct... | 09/09/2003 |
| 6602778 | Apparatus and methods for coupling conductive leads of semiconductor assemblies A method and apparatus for electrically coupling bond pads on the surface of a microelectronic device. The apparatus can include a microelectronic device having at least two bond pads with a conductive member extending between the bond pads, external to t... | 08/05/2003 |
| 6589851 | Semiconductor processing methods of forming a conductive grid In one aspect, the invention provides a method of forming an electrical connection in an integrated circuitry device. According to one preferred implementation, a diffusion region is formed in semiconductive material. A conductive line is formed which is ... | 07/08/2003 |
| 6552435 | Integrated circuit with conductive lines disposed within isolation regions In one aspect, the invention provides a method of forming an electrical connection in an integrated circuitry device. According to one preferred implementation, a diffusion region is formed in semiconductive material. A conductive line is formed which is ... | 04/22/2003 |
| 6509213 | Methods of forming transistors and connections thereto In one aspect, the invention provides a method of forming an electrical connection in an integrated circuitry device. According to one preferred implementation, a diffusion region is formed in semiconductive material. A conductive line is formed which is ... | 01/21/2003 |
| 6472764 | Method and apparatus for implementing selected functionality on an integrated circuit device A semiconductor device is disclosed that includes a die having an active surface bearing integrated circuitry, the die including a plurality of bond pads thereon at least some of which are connected to the integrated circuitry and having at least one elec... | 10/29/2002 |
