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| Number | Title | Issue Date |
| 7282438 | Low-k SiC copper diffusion barrier films Copper diffusion barrier films having low dielectric constants are suitable for a variety of copper/inter-metal dielectric integration schemes. Copper diffusion barrier films in accordance with the invention are composed of one or more layers of silicon carbide, at ... | 10/16/2007 |
| 7273770 | Compliant passivated edge seal for low-k interconnect structures A structure for a chip or chip package is disclosed, with final passivation and terminal metallurgy which are mechanically decoupled but electrically coupled to the multilayer on-chip interconnects. This decoupling allows the chip to survive packaging stresses in th... | 09/25/2007 |
| 7153725 | Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods therefor A method for fabricating a semiconductor package with a substrate in a strip format is provided. Semiconductor devices are attached in a strip format to the substrate, and a thermal interface material is applied to the semiconductor devices. A flat panel heat spread... | 12/26/2006 |
| 7098544 | Edge seal for integrated circuit chips A structure for a chip or chip package is disclosed, with final passivation and terminal metallurgy which are mechanically decoupled but electrically coupled to the multilayer on-chip interconnects. This decoupling allows the chip to survive packaging stresses in th... | 08/29/2006 |
| 6680241 | Method of manufacturing semiconductor devices by dividing wafer into chips and such semiconductor devices A plurality of chips divided from a semiconductor wafer having a plurality of semiconductor integrated circuits formed on a front surface of the wafer, are prepared, front surfaces of the chips being bonded to a first wafer sheet. The back and side surfac... | 01/20/2004 |
| 6670705 | Protective layer for a semiconductor device A semiconductor device comprises at least one first semiconductor layer (1-4) and a second layer (8) applied on at least a surface portion of the first layer for protecting the device. The protecting layer is of a second material having a larger energy ga... | 12/30/2003 |
| 6641254 | Electronic devices having an inorganic film An electronic device includes a substrate, a substrate electrical connector disposed on the substrate, and a carrier lead electrically coupled to the substrate electrical connector. In addition, the electronic device further includes a polymer enclosing t... | 11/04/2003 |
| 6590257 | Semiconductor device and method for manufacturing the same, semiconductor wafer and semiconductor device manufactured thereby A semiconductor device including a base semiconductor substrate having an edge area which surrounds an element forming area, a buried oxide film provided over the base semiconductor substrate in the element forming area, and an element forming semiconduct... | 07/08/2003 |
| 6551912 | Method of forming a conductive coating on a semiconductor device On a semiconductor die, a conductive layer is formed by first attaching a semiconductor wafer to a support wafer, then cutting the semiconductor wafer into dies, and finally depositing a conductive layer on the sides of the dies. The conductive layer is p... | 04/22/2003 |
| 6534386 | Method of manufacturing semiconductor chips A method of manufacturing semiconductor chips includes adhering a sheet that is to be tensioned to a reverse side of a semiconductor wafer on a front side of which an integrated circuit has been formed; separating individual semiconductor chips from the s... | 03/18/2003 |
| 6486005 | Semiconductor package and method for fabricating the same A semiconductor package and fabricating method are described, in which solder balls can be easily arrayed in a fan-out type arrangement and the package fabricating process is simplified. The semiconductor package includes a unit semiconductor chip and a f... | 11/26/2002 |
| 6468639 | Single-application polyimidosiloxane-based coating material and cured film A single-application polyimidosiloxane coating material comprising a uniformly mixed solution composition of a polyimidosiloxane with an epoxy resin-reactive group in the molecule, an epoxy resin and a fine inorganic filler in a solvent. The coating mater... | 10/22/2002 |
| 6424051 | Semiconductor device To improve the moisture resistance of a chip size package, a seal ring 4 is made up of tungsten plugs and metal electrodes 11 and 12. Further, a spacer is formed on both or either of a first flank 13 and a second flank 14. The spacer can be formed on all ... | 07/23/2002 |
| 6420211 | Method for protecting an integrated circuit chip The invention concerns a method for protecting integrated circuit chips of a silicon wafer. The silicon wafer is cut so as to disengage the chips from the integrated circuit; and a fluid insulating material is applied on the rear surface of the wafer so a... | 07/16/2002 |
| 6403398 | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device A resin sealing type semiconductor device, a manufacturing method thereof and a packaging structure thereof are capable of downsizing the semiconductor device and attaining high-density packaging. For this, the resin sealing type semiconductor device with... | 06/11/2002 |
| 6365440 | Method for contacting a circuit chip In a method for contacting a circuit chip containing an integrated circuit of a thickness less than 50 μm, which has at least two pads on a first main surface, the circuit chip is first of all placed onto a main surface of a support substrate with a seco... | 04/02/2002 |
| 6337226 | Semiconductor package with supported overhanging upper die A circuit assembly is provided with a lower die and an upper die offset and stacked on the lower die. A supporting material, such as a dielectric molding compound or epoxy resin, is dispensed along the side surfaces of the lower die under the overhanging ... | 01/08/2002 |
| 6303977 | Fully hermetic semiconductor chip, including sealed edge sides A structure and method for forming a hermetically sealed semiconductor chip having an active and a passive surface and four edge sides, each edge side having only a single plane; said active surface having an integrated circuit including multiple deposite... | 10/16/2001 |
| 6284554 | Process for manufacturing a flip-chip integrated circuit A method of producing a packaged semiconductor chip including hardened resin packaging and a polished electrode includes producing an electrode on a first surface of a semiconductor substrate; depositing a glass layer on the first surface of the semicondu... | 09/04/2001 |
| 6281591 | Semiconductor apparatus and semiconductor apparatus manufacturing method The sealing resin of a semiconductor device is prevented from being peeled off from the substrate of the semiconductor device. A semiconductor device according to the present invention has a semiconductor substrate containing a central portion having a fi... | 08/28/2001 |
| 6225704 | Flip-chip type semiconductor device A flip-chip type semiconductor device has a semiconductor chip mounted on a substrate via a plurality of bumps. The gap between the substrate and the chip is filled with an underfill material and sealed along sides thereof with a fillet material. The unde... | 05/01/2001 |
| 6204566 | Resin encapsulated electrode structure of a semiconductor device, mounted semiconductor devices, and semiconductor wafer including multiple electrode structures A semiconductor integrated circuit device includes a semiconductor substrate having a first surface and including electrodes on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrat... | 03/20/2001 |
| 6147398 | Semiconductor device package A packaging structure is capable of electrically connecting an external lead to a pad of a semiconductor chip by directly bonding the external lead to the pad of the semiconductor chip without an adhesive, which requires no resin sealing. The packaging st... | 11/14/2000 |
| 6054727 | Power semiconductor component A power semiconductor component includes a semiconductor body having a beed peripheral surface, a cathode electrode and an anode electrode. A materially joined connection between at least the anode electrode and the semiconductor body is not produced by ... | 04/25/2000 |
| 5914527 | Semiconductor device The present invention is directed to a semiconductor device and method wherein a vertical opening is provided or formed completely through a semiconductor substrate of the semiconductor device to print an external electrical contact to be made to one of t... | 06/22/1999 |
| 5908316 | Method of passivating a semiconductor substrate A method of passivating a semiconductor substrate includes singulating (13) a semiconductor substrate (23) from a semiconductor wafer, coupling (14) a heatsink (21) to the semiconductor substrate (23), etching (15) the semiconductor substrate (23) in a ch... | 06/01/1999 |
| 5886403 | Sealed rectifier A sealed rectifier used in a vehicle alternator is composed of a semiconductor diode chip, a base electrode having a disk plate which has a central mount for supporting the chip and an annular wall extending higher than the central mount, a pole electrode... | 03/23/1999 |
| 5831291 | Insulated gate bipolar transistors A semiconductor device comprises a plurality of IGBT-like cells arranged in groups on a single wafer of silicon. Each group of cells has a unified gate structure and a unified source structure electrically insulated therefrom but physically overlying it. ... | 11/03/1998 |
| 5814882 | Seal structure for tape carrier package An organic insulation film has inner leads electrically connecting a conductor thereof with an LSI chip. The inner leads are connected to pads on the periphery of the LSI chip. The connecting portions between the inner leads and the pads of the LSI chip a... | 09/29/1998 |
| 5796123 | Semiconductor component mounted by brazing A mesa-type semiconductor component including on at least one of its surfaces, in addition to a circumferential ring constituted by a portion of a passivating glass layer, at least one pad constituted by a portion of this layer and acting as a spacer.... | 08/18/1998 |
| 5650638 | Semiconductor device having a passivation layer A semiconductor device comprises at least one semiconductor layer (1-3) of SiC and a layer (6) applied on at least a portion of an edge surface (19) of said SiC-layer so as to passivate this edge surface portion. At least the portion of said passivation l... | 07/22/1997 |
| 5635766 | Hermetically sealed semiconductor device A semiconductor device which includes device bonding pads exposed through oxide windows formed in a passivation oxide layer providing electrical connections to the metallized regions, a bonding pad of a different material electrically connected to the dev... | 06/03/1997 |
| 5610439 | Press-contact type semiconductor devices A press-contact type semiconductor device having multiple semiconductor substrates, a periphery of which being enclosed by a chip frame of insulating resin a first electrode plate and a second electrode plate. The semiconductor substrates are arranged on ... | 03/11/1997 |
| 5574285 | Electromagnetic radiation detector and its production process Electromagnetic radiation detector and its production process. The detector comprises a thin detection material film (8), which is sensitive to the radiation to be detected and which has a first and a second faces (10, 12), the first face being directly e... | 11/12/1996 |
| 5557148 | Hermetically sealed semiconductor device A semiconductor device which includes device bonding pads exposed through oxide windows formed in a passivation oxide layer providing electrical connections to the metallized regions, a bonding pad of a different material electrically connected to the dev... | 09/17/1996 |
| 5533664 | Method of manufacturing a semiconductor device In bonding the connecting electrodes of adjacent semiconductor chips to each other, a solder layer shaped like a bump is formed on that portion of the connecting electrode which is positioned on the upper surface of the semiconductor chip. The semiconduct... | 07/09/1996 |
| 5519231 | Pressure-connection type semiconductor device having a thermal compensator in contact with a semiconductor base substrate in an alloy-free state In order to obtain a pressure-connection type semiconductor device while preventing misregistration of a semiconductor base substrate and a thermal compensator with no penetration of an insulating/holding material and a method suitable for fabricating thi... | 05/21/1996 |
| 5489802 | Pressure contact type semiconductor device and heat compensator A semiconductor substrate (2) is pressed against heat compensators (6, 31) for electrical contact therewith without brazing. Silicone rubber (32) fixes the outer peripheral edge of the semiconductor substrate (2) and its adjacent portion on the heat compe... | 02/06/1996 |
| 5474957 | Process of mounting tape automated bonded semiconductor chip on printed circuit board through bumps Conductive leads are connected at inner ends thereof to electrodes of a semiconductor chip through a tape automated bonding process, and bumps are formed on the other ends of the conductive leads so as to economically and reliably mount the semiconductor ... | 12/12/1995 |
| 5270571 | Three-dimensional package for semiconductor devices A three-dimensional microelectronic package for semiconductor chips includes alternating layers of wafer interconnect stacks and chip carrier modules. The wafer interconnect stacks provide electrical interconnections in the x, y, and z directions. The waf... | 12/14/1993 |