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| Number | Title | Issue Date |
| 7432130 | Method of packaging semiconductor die without lead frame or substrate A method of packaging a semiconductor die (10) includes providing a flip-chip die (10) with bump connections (12) on its bottom surface (14). An adhesive tape (18) is attached to a plate surface (16) and lead fingers (20 | 10/07/2008 |
| 7432604 | Semiconductor component and system having thinned, encapsulated dice A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dens... | 10/07/2008 |
| 7429799 | Land patterns for a semiconductor stacking structure and method therefor A semiconductor device has a substrate and an encapsulation area on a first surface of the substrate. A first plurality of metal lands is on the first surface of the substrate around a periphery of the encapsulation area. Solder mask covers portions of the first plu... | 09/30/2008 |
| 7425469 | Method for encapsulating an electronic component using a foil layer The invention relates to a method for encapsulating an electronic component, in particular a semiconductor, fixed on a carrier, comprising the processing steps of: a) placing at least one foil layer in a mould, b) placing the carrier in contact with the foil layer w... | 09/16/2008 |
| 7416913 | Methods of manufacturing microelectronic imaging units with discrete standoffs Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include an image sens... | 08/26/2008 |
| 7417325 | Semiconductor component having thinned die with conductive vias configured as conductive pin terminal contacts A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dens... | 08/26/2008 |
| 7417330 | Semiconductor device packaged into chip size and manufacturing method thereof A semiconductor device includes a semiconductor substrate having an integrated circuit and at least one connection pad, and at least one external connection electrode electrically connected with the connection pad. A first sealing material is provided on the semicon... | 08/26/2008 |
| 7407836 | High-voltage module and method for producing same The invention relates to a high-voltage module comprising a housing (9) which accommodates at least one structural component (4, 5) that is fastened on a metal-ceramics substrate from a ceramic layer (1) comprising a first main face (11) ... | 08/05/2008 |
| 7402457 | Method for making contact with electrical contact with electrical contact surfaces of substrate and device with substrate having electrical contact surfaces A film, based on polyimide or epoxy, is laminated onto a surface of a substrate under a vacuum, so that the film closely covers the surface and adheres thereto. Contact surfaces to be formed on the surface are uncovered by opening windows in the film. A contact is e... | 07/22/2008 |
| 7397140 | Chip module A chip module having a chip which is mounted by means of chip adhesive on a mount and is electrically connected via bonding wires to contact pads, and an encapsulation compound which surrounds the chip and the bonding wires and is bounded by a subarea of the mount. ... | 07/08/2008 |
| 7387914 | Semiconductor device and process for fabrication thereof A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not m... | 06/17/2008 |
| 7384822 | Package for semiconductor components and method for producing the same The invention relates to a packaging for semiconductor components such as FBGA packages in BOC technology or the like, wherein at least the back and the lateral edges of a chip (2) mounted on a substrate are enclosed by a mold coating (6), the casting ... | 06/10/2008 |
| 7382059 | Semiconductor package structure and method of manufacture In one embodiment, a semiconductor package is formed by adding a layer of particles to desired portions of a packing substrate. The layer of particles forms a matrix of crevices that provides a micro-lock feature for mechanically locking or engaging encapsulating ma... | 06/03/2008 |
| 7378300 | Integrated circuit package system An integrated circuit package system is provided including forming a leadframe structure having a encapsulant space provided predominantly inside the leadframe structure and attaching a die to the leadframe structure in the encapsulant space inside the leadframe str... | 05/27/2008 |
| 7378301 | Method for molding a small form factor digital memory card A method for molding digital storage memory cards such as, for example, multimedia cards (MMC), secure digital cards (SD), and similar small form factor digital memory cards. A PCA subassembly including, for example, a leadframe (TSOP) package for enclosing a flash ... | 05/27/2008 |
| 7352070 | Polymer encapsulated electrical devices Improved encapsulated, overmolded and/or underfilled electrical components having a complete encapsulation, overmolding and/or underfilling with a coefficient of thermal expansion that is uniform and substantially free of gradients includes a polymeric matrix and an... | 04/01/2008 |
| 7332375 | Method of making an integrated circuit package A method of making a package includes providing a metal leadframe having a die pad in a rectangular frame. Tabs extend from the frame toward the die pad. The die pad and tabs have side surfaces with reentrant portions and asperities. A die is attached to the die pad... | 02/19/2008 |
| 7327044 | Integrated circuit package encapsulating a hermetically sealed device An integrated circuit package is disclosed having a semiconductor chip, a device supported by the semiconductor chip, and a molding compound sealing the semiconductor chip and the device together as a composite package. A method of manufacturing the package is also ... | 02/05/2008 |
| 7312106 | Method for encapsulating a chip having a sensitive surface Method for encapsulating a chip having a sensitive surface exposed in a sealed highly clean cavity package, includes bonding a chip's contact pads to lead frame contact pads, positioning the chip and lead frame into one part of a two part mould, taking measures to k... | 12/25/2007 |
| 7282438 | Low-k SiC copper diffusion barrier films Copper diffusion barrier films having low dielectric constants are suitable for a variety of copper/inter-metal dielectric integration schemes. Copper diffusion barrier films in accordance with the invention are composed of one or more layers of silicon carbide, at ... | 10/16/2007 |
| 7265009 | HDP-CVD methodology for forming PMD layer A method of forming an HDP-CVD pre-metal dielectric (PMD) layer to reduce plasma damage and/or preferential sputtering at a reduced a thermal budget including providing a semiconductor substrate comprising at least two overlying semiconductor structures separated by... | 09/04/2007 |
| 7245008 | Ball grid array package, stacked semiconductor package and method for manufacturing the same A BGA package including a substrate, a plurality of solder balls on the semiconductor and an encapsulant, which leaves the solder balls partially exposed on the semiconductor chip, thereby reducing the size of the BGA package. In addition, an edge of the substrate m... | 07/17/2007 |
| 7224061 | Package structure A package structure including a device, an interconnecting element, a pad and a protecting element is provided. The device connects with a first end of the interconnecting element through the pad. The protecting element covers the pad and the first end of the interc... | 05/29/2007 |
| 7224075 | Methods and systems for attaching die in stacked-die packages A system and a method for producing a multiple-die device by attaching a die to a substrate using a first die-attach material having a first processing temperature and attaching a subsequent die using a second die-attach material having a second processing temperatu... | 05/29/2007 |
| 7214997 | Integrated optical device An integrated optical device allowing for higher flexibility in designing its outer shape and securing hermetic sealing is provided, which includes a ceramic substrate mounting a light source, a covering member fixed to the substrate for covering the light source, a... | 05/08/2007 |
| 7211451 | Process for producing a component module A process for producing a component module comprising a module carrier and a plurality of components with which contact is made on the latter, comprising the following steps: arranging separated components on a surface-adhesive fil... | 05/01/2007 |
| 7208418 | Sealing sidewall pores in low-k dielectrics Barrier metal layer discontinuities or gaps due to low-k dielectric porosity is reduced by sealing sidewall porosity before barrier metal layer deposition. Embodiments include sealing sidewall porosity by depositing a swelling agent, adhesion promoter or an addition... | 04/24/2007 |
| 7193331 | Semiconductor device and manufacturing process thereof One of the aspects of the present invention is to provide a semiconductor device, which includes a circuit board, a first semiconductor chip mounted on the circuit board, a built-in semiconductor package on the first semiconductor chip, and a first molded resin enco... | 03/20/2007 |
| 7183580 | Electro-optical device, manufacturing method of the same, and electronic apparatus To provide an electro-optical device having a buffer layer which planarizes a gas barrier layer so that stress-concentration in the gas barrier layer is reduced, the buffer layer being prevented from leaking out of a predetermined area, and to provide a method of pr... | 02/27/2007 |
| 7160756 | Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra-low k devices A process for packaging semiconductor devices for flip chip and wire bond applications, wherein specific materials of the semiconductor devices are protected during device processing sequences and dicing procedures, has been developed. After definition of copper int... | 01/09/2007 |
| 7135358 | Process for producing resin-sealed type electronic device There is disclosed a process for producing a resin-sealed type electronic device which comprises forming a dam frame on edge and side portions of a substrate loaded with a single or a plurality of electronic elements so as to encompass the electronic elements by sti... | 11/14/2006 |
| 7122908 | Electronic device package An electronic device package comprises a substrate, a die, and a material having a Young's modulus of between about 0.1 megapascals and about 20 megapascals (at a solder reflow temperature) for attaching the die to the substrate. In one embodiment, the package utili... | 10/17/2006 |
| 7119449 | Enhancement of underfill physical properties by the addition of thermotropic cellulose An electrical component having improved impact resistance and improved tolerance for thermal cycling, without sacrificing high-temperature performance, and without requiring unconventional and expensive manufacturing techniques includes an electric device mounted on... | 10/10/2006 |
| 7119356 | Forming closely spaced electrodes The present invention provides an apparatus and a method of fabricating the apparatus. The apparatus comprises a substrate having a planar surface and first and second electrodes located on the planar surface. The first electrode has a top surface and a lateral surf... | 10/10/2006 |
| 7109062 | Semiconductor integrated device including support substrate fastened using resin, and manufacturing method thereof A semiconductor integrated device, provided with a semiconductor chip on which a semiconductor integrated circuit is formed and a support substrate laminated on at least one surface of the semiconductor chip, wherein the semiconductor chip and the support substrate ... | 09/19/2006 |
| 4803542 | Carrier element for an IC-module A carrier element for an IC-module for incorporation into an identification card. The element includes a flexible carrier film supporting conductive leads and contact pads. A semi-conductor chip is electrically connected to the leads and pads. Cast resin ... | 02/07/1989 |
| 4709254 | Carrier element for an IC module A carrier element for an IC-module for incorporation into an identification card. The element includes a flexible carrier film supporting conductive leads and contact pads. A semi-conductor chip is electrically connected to the leads and pads. Cast resin ... | 11/24/1987 |
| 4634474 | Coating of III-V and II-VI compound semiconductors Proposed is a method of fabricating III-V and II-VI compound semiconductors and a resulting product where there is formed on the surface a coating which can function as a diffusion mask and/or a passivation layer. The coating is a silicon layer deposited ... | 01/06/1987 |
