Quotables
"The abolishment of pain in surgery is a chimera. It is absurd to go on seeking it...knife and pain are two words in surgery that must forever be associated in the consciousness of the patient."
Dr. Alfred Velpeau, French surgeon ; 1839
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7439614 | Circuit device with dummy elements In a manufacturing method of a hybrid integrated circuit device 10 according to the present invention, a first dummy pattern D1 is provided on a first wiring layer 18A. Furthermore, a second dummy pattern D2 is provided on a second wiring... | 10/21/2008 |
| 7436060 | Semiconductor package and process utilizing pre-formed mold cap and heatspreader assembly A semiconductor integrated circuit package incorporating a preformed one-piece mold cap and heatspreader assembly is disclosed. One implementation includes a substrate with a die attached to the substrate. The die is electrically connected with electrical connection... | 10/14/2008 |
| 7429502 | Integrated circuit device incorporating metallurgical bond to enhance thermal conduction to a heat sink An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufactu... | 09/30/2008 |
| 7420273 | Thinned die integrated circuit package A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die... | 09/02/2008 |
| 7400035 | Semiconductor device having multilayer printed wiring board A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed ... | 07/15/2008 |
| 7397119 | Wafer-level diamond spreader An embodiment of the present invention is a technique to heat spread at wafer level. A silicon wafer is thinned. A chemical vapor deposition diamond (CVDD) wafer processed. The CVDD wafer is bonded to the thinned silicon wafer to form a bonded wafer. Metallization i... | 07/08/2008 |
| 7388286 | Semiconductor package having enhanced heat dissipation and method of fabricating the same A semiconductor package comprising a semiconductor chip and a first heat spreader adhered to the upper surface of the semiconductor chip is provided. The first heat spreader comprises a flat metal plate and a plurality of metal balls adhered to the flat metal plate.... | 06/17/2008 |
| 7387915 | Method for manufacturing heat sink of semiconductor device A method for manufacturing a heat sink of a semiconductor device is described. In the method, an adhesive tape is provided, wherein the adhesive tape includes a first surface and a second surface on opposite sides, and the first surface of the adhesive tape adheres ... | 06/17/2008 |
| 7382000 | Semiconductor device A semiconductor device is provided which comprises a connecting lead 4 mounted between a MOS-FET 1 and a regulatory IC 2 on a support plate 3. Connecting lead 4 has a thermally radiative and electrically conductive substrate 6 | 06/03/2008 |
| 7378730 | Thermal interconnect systems methods of production and uses thereof Layered interface materials described herein include at least one pulse-plated thermally conductive material, such as an interconnect material, and at least one heat spreader component coupled to the at least one pulse-plated thermally conductive material. A plated ... | 05/27/2008 |
| 7372146 | Semiconductor module A semiconductor module includes a parts-mounting or packaging substrate, a plurality of power metal insulator semiconductor (MIS) chips which have top surfaces and back surfaces and are mounted by flip chip bonding on or above the package substrate while letting the... | 05/13/2008 |
| 7372139 | Semiconductor chip package A semiconductor chip package may include a substrate, which may have bonding pads formed thereon. A semiconductor chip mounted on the substrate may have chip pads, and electrical connections for connecting the chip pads of the semiconductor chip to the substrate bon... | 05/13/2008 |
| 7355276 | Thermally-enhanced circuit assembly A circuit assembly for mounting one or more integrated circuits that effectively dissipates heat generated by the integrated circuits, and a corresponding method for fabricating such a circuit assembly. The circuit assembly comprises a substrate, a thermally-conduct... | 04/08/2008 |
| 7342305 | Thermally enhanced cavity-down integrated circuit package A cavity-down ball grid includes a flexible circuit tape including a flexible tape laminated to a conductor layer. The flexible circuit tape has an aperture therein. A thermally conductive heat spreader is fixed to a first surface of the flexible circuit tape and th... | 03/11/2008 |
| 7338840 | Method of forming a semiconductor die with heat and electrical pipes Thermal hot spots in the substrate of a semiconductor die, and the required surface area of the semiconductor die, are substantially reduced by forming thermal or thermal and electrical pipes in the substrate that extend from a bottom surface of the substrate to a p... | 03/04/2008 |
| 7332807 | Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of t... | 02/19/2008 |
| 7332806 | Thin, thermally enhanced molded package with leadframe having protruding region A semiconductor die package. It includes (a) a semiconductor die including a first surface and a second surface, (b) a source lead structure including protruding region having a major surface, the source lead structure being coupled to the first surface, (c) a gate ... | 02/19/2008 |
| 7327029 | Integrated circuit device incorporating metallurigical bond to enhance thermal conduction to a heat sink An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufactu... | 02/05/2008 |
| 7327032 | Semiconductor package accomplishing fan-out structure through wire bonding Provided is a semiconductor package accomplishing a fan-out structure through wire bonding in which a pad of a semiconductor chip is connected to a printed circuit board through wire bonding. A semiconductor package can be produced without a molding process and can ... | 02/05/2008 |
| 7316789 | Conducting liquid crystal polymer nature comprising carbon nanotubes, use thereof and method of fabrication Conducting liquid crystal polymer matrix comprising carbon nanotubes aligned in the matrix is provided, along with use thereof and method of fabrication. ... | 01/08/2008 |
| 7315079 | Thermally-enhanced ball grid array package structure and method A thermally-enhanced ball grid array package structure is provided that includes an integrated circuit chip, a heat spreader and a substrate. The integrated circuit chip has a specified surface area. The heat spreader is coupled to the integrated circuit chip. The s... | 01/01/2008 |
| 7312525 | Thermally enhanced package for an integrated circuit A circuit assembly having an insulating base, a heat-conducting plate and a circuit containing die is disclosed. The die is in thermal contact with the heat-conducting plate, which is bonded to the insulating base. The insulating base includes heat-conducting channe... | 12/25/2007 |
| 7304372 | Semiconductor package A semiconductor package including a bidirectional compound semiconductor component and two power semiconductor devices connected in a cascode configuration. ... | 12/04/2007 |
| 7298044 | Electronic device with heat dissipation module An electronic device. The electronic device includes a circuit board, a heat dissipation module, and a light-emitting diode. The circuit board includes a heating element thereon. The heat dissipation module is disposed on the circuit board and the heating element. T... | 11/20/2007 |
| 7291913 | System and method for high performance heat sink for multiple chip devices A custom-molded heat sink corresponds to an individual substrate and includes a heat sink lid having at least one cavity corresponding to at least one die mounted on a substrate. A conductive layer is deposited in the at least one cavity that substantially fills the... | 11/06/2007 |
| 7288438 | Solder deposition on wafer backside for thin-die thermal interface material A solder is deposited on the backside of a wafer. The wafer can be pre-deposited with a barrier layer such as a titanium base and other materials. Deposition is carried out by electroplating, electroless plating, chemical vapor deposition, and physical vapor deposit... | 10/30/2007 |
| 7268425 | Thermally enhanced electronic flip-chip packaging with external-connector-side die and method A method and apparatus for making a package having improved heat conduction characteristics and high frequency response. A relatively thick package substrate, such as copper, has a wiring layer bonded to one face, leaving the opposite face exposed, for example, to b... | 09/11/2007 |
| 7262510 | Chip package structure A process for fabricating a chip package structure with the following steps is provided. First, a chip having an active surface is provided. A plurality of solder bumps is disposed on the active surface. Then, a polymer material including flux is placed on the surfa... | 08/28/2007 |
| 7256494 | Chip package A chip package including a heat spreader, a circuit substrate, locating structures, a chip, wires, and an encapsulating compound is provided. The heat spreader has a bonding surface, and the circuit substrate is disposed on the bonding surface of the heat spreader. ... | 08/14/2007 |
| 7247930 | Power management integrated circuit A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a power management die bonded to the CPU die in a three dimensional packaging layout. ... | 07/24/2007 |
| 7245022 | Semiconductor module with improved interposer structure and method for forming the same Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections ... | 07/17/2007 |
| 7235874 | Semiconductor device, its manufacturing method, circuit board, and electronic unit A semiconductor device includes an interposer having first and second faces pointing in opposite directions to each other and a metallization pattern formed on the first face, and a semiconductor chip mounted on the first face of the interposer and having an electro... | 06/26/2007 |
| 7235876 | Semiconductor device having metallic plate with groove A semiconductor device includes: first and second metallic plates, each of which includes a heat radiation surface and an inner surface; a semiconductor element between the metallic plates; a block between the second metallic plate and the semiconductor element; a s... | 06/26/2007 |
| 7230332 | Chip package with embedded component A chip package is provided. The chip package includes at least one chip, an interconnection structure, a plurality of second pads and at least one panel-shaped component, wherein the chip includes a plurality of first pads on a surface thereof. The interconnection s... | 06/12/2007 |
| 7217995 | Apparatus for stacking electrical components using insulated and interconnecting via An efficient chip stacking structure is described that includes a leadframe having two surfaces to each of which can be attached stacks of chips. A chip stack can be formed by placing a chip active surface on a back surface of another chip. Electrical connections be... | 05/15/2007 |
| 7217997 | Ground arch for wirebond ball grid arrays A structure provides for the control of bond wire impedance. In an example embodiment, there is an integrated circuit device comprising a semiconductor device die having a plurality of grounding pads, signal pads, and power pads and a package for mounting the integr... | 05/15/2007 |
| 7202561 | Semiconductor package with heat dissipating structure and method of manufacturing the same A semiconductor package in which heat is easily dissipated and a semiconductor chip is not damaged during a molding process, and a method of manufacturing the same. The semiconductor package with a heat dissipating structure includes a substrate, a semiconductor chi... | 04/10/2007 |
| 7202559 | Method of assembling a ball grid array package with patterned stiffener layer Electrically, mechanically, and thermally enhanced ball grid array (BGA) packages are described. An IC die is mounted in a centrally located cavity of a substantially planar first surface of a stiffener. The first surface of a substrate is attached to a substantiall... | 04/10/2007 |
| 7183642 | Electronic package with thermally-enhanced lid Removing heat generated by an operating IC chip from both the chip and the electronics package containing the chip is essential for proper system operation and to increase the life of the electronics package. Using an air permeable lid with the electronic package in... | 02/27/2007 |
| 7180175 | Thermally-enhanced ball grid array package structure and method A thermally-enhanced ball grid array package structure is provided that includes an integrated circuit chip, a heat spreader and a substrate. The integrated circuit chip has a specified surface area. The heat spreader is coupled to the integrated circuit chip. The s... | 02/20/2007 |
