Did You Know...
...that a workman who left the soap mixing machine on too long was responsible for making Ivory Soap? He was so embarrassed by his mistake that he threw the mess in a stream. Imagine his dismay when the evidence of his error floated to the surface! Result: Ivory soap, the soap that floats.
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| Number | Title | Issue Date |
| 7429797 | Electronic device and carrier substrate Consistent with an example embodiment, an electronic device comprises a semiconductor device, particularly an integrated circuit, and a carrier substrate with conductive layers on the first side and the second side, and voltage supply and ground connections mutually... | 09/30/2008 |
| 7425760 | Multi-chip module structure with power delivery using flexible cables One embodiment of the present invention provides an integrated circuit module. This module includes a semiconductor die with an active face, upon which active circuitry and signal pads reside, and a back face opposite the active face. The module uses a flexible cabl... | 09/16/2008 |
| 7411295 | Circuit board, device mounting structure, device mounting method, and electronic apparatus A circuit board has a metal pattern that is formed on a surface of the circuit board to be connected with bumps in two-dimensional arrangement for mounting an electronic device that has the bumps. A plurality of the bumps which has even electrical potentials is elec... | 08/12/2008 |
| 7405486 | Circuit device In stack packaging, an IC chip in an upper layer and an IC chip in a lower layer are insulated from each other by use of an insulating adhesive and the like. Thus, if an analog IC chip is stacked in the upper layer, a substrate is set in a floating state. Accordingl... | 07/29/2008 |
| 7391122 | Techniques for flip chip package migration Techniques for integrated circuit packaging in a flip chip configuration that ensures a migration path between related integrated circuits and utilizes core I/O (or area I/O) are provided. An integrated circuit, having a superset of functional circuit elements as co... | 06/24/2008 |
| 7391110 | Apparatus for providing capacitive decoupling between on-die power and ground conductors One embodiment of the present invention provides capacitive decoupling on the surface of a semiconductor die, instead of providing the decoupling on a package or printed circuit board to which the semiconductor die is attached. In this embodiment, a surface of a sem... | 06/24/2008 |
| 7385281 | Semiconductor integrated circuit device A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a ... | 06/10/2008 |
| 7372139 | Semiconductor chip package A semiconductor chip package may include a substrate, which may have bonding pads formed thereon. A semiconductor chip mounted on the substrate may have chip pads, and electrical connections for connecting the chip pads of the semiconductor chip to the substrate bon... | 05/13/2008 |
| 7361984 | Chip package structure A chip package structure including a lead frame, at least one first bonding wire, at least one second bonding wire, third bonding wires and an encapsulant is provided. The lead frame includes a die pad, inner leads and at least one bus bar, wherein the bus bar is di... | 04/22/2008 |
| 7358548 | Semiconductor integrated circuit having layout in which buffers or protection circuits are arranged in concentrated manner Buffers are arranged in a concentrated manner in a region distant from pads. The region refers to a region in a main region of a semiconductor integrated circuit, except for a central processing unit, a non-volatile memory and a volatile memory. As the buffer requir... | 04/15/2008 |
| 7355280 | Method for forming a bump, semiconductor device and method of fabricating same, semiconductor chip, circuit board, and electronic instrument A method for forming a bump includes the steps of forming a resist layer so that a through-hole formed therein is located on a pad; and forming a metal layer to be electrically connected to the pad conforming to the shape of the through-hole. The metal layer is form... | 04/08/2008 |
| 7353595 | Method for manufacturing a printed circuit board that mounts an integrated circuit device thereon A tape substrate includes IC lands electrically connected to pins of a driver IC (integrated circuit), circuit board terminal lands electrically connected to an external circuit board, test lands for testing the driver IC mounted on the tape substrate, and a plating... | 04/08/2008 |
| 7355267 | Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements A method of forming a multiconductor via includes forming at least one seed layer in at least one through-hole of a substrate, selectively patterning the seed layer to form a plurality of laterally separated regions, and depositing metal upon the regions. Alternativ... | 04/08/2008 |
| 7339260 | Wiring board providing impedance matching A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via... | 03/04/2008 |
| 7335985 | Method and system for electrically coupling a chip to chip package A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and reception of electromagnetic signals. Both the chip and the chip package have at least one such converter ... | 02/26/2008 |
| 7332763 | Selective coupling of voltage feeds for body bias voltage in an integrated circuit device An integrated circuit device having a body bias voltage mechanism. The integrated circuit comprises a resistive structure disposed therein for selectively coupling either an external body bias voltage or a power supply voltage to biasing wells. A first pad for coupl... | 02/19/2008 |
| 7327024 | Power module, and phase leg assembly A power module includes a substrate that includes an upper layer, an electrical insulator and a thermal coupling layer. The upper layer includes an electrically conductive pattern and is configured for receiving power devices. The electrical insulator is disposed be... | 02/05/2008 |
| 7319264 | Semiconductor device A semiconductor device has a structure capable of connecting a lead terminal directly to an electrode on a front surface thereof. The semiconductor device includes a first main electrode provided on the front surface, a second main electrode provided on a back surfa... | 01/15/2008 |
| 7304372 | Semiconductor package A semiconductor package including a bidirectional compound semiconductor component and two power semiconductor devices connected in a cascode configuration. ... | 12/04/2007 |
| 7294904 | Integrated circuit package with improved return loss A packaged integrated circuit includes an integrated circuit and a package substrate. A trace in the package substrate includes a first portion and a second, high-inductance, portion. The high-inductance portion of the trace is proximate to a port of the integrated ... | 11/13/2007 |
| 7282795 | Modifying a semiconductor device to provide electrical parameter monitoring A method of modifying a semiconductor device to provide electrical parameter monitoring. The device includes a semiconductor die and a package substrate. The substrate includes a conductive plane. The die is connected to the plane via a plurality of connection struc... | 10/16/2007 |
| 7282784 | Methods of manufacture of a via structure comprising a plurality of conductive elements and methods of forming multichip modules including such via structures A method of forming a multiconductor via includes forming at least one seed layer in at least one through-hole of a substrate, selectively patterning the seed layer to form a plurality of laterally separated regions, and depositing metal upon the regions. Alternativ... | 10/16/2007 |
| 7253516 | Electronic device and carrier substrate for same Consistent with an example embodiment, an electronic device comprises an integrated circuit and a carrier substrate with a bottom and top conductive layer, and is provided with voltage supply, ground and signal transmission connections. In order to enable the use of... | 08/07/2007 |
| 7253505 | IC substrate with over voltage protection function The present invention relates to an IC substrate provided with over voltage protection functions and thus, a plurality of over voltage protection devices are provided on a single substrate to protect an IC chip directly. According to the present invention, there is ... | 08/07/2007 |
| 7247932 | Chip package with capacitor A chip package for semiconductor chips is provided by the method of forming a chip package includes the steps of forming a printed circuit board with a window therethrough; forming semiconductor chip connections of one or more primary chips which overlie the window ... | 07/24/2007 |
| 7242099 | Chip package with multiple chips connected by bumps A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pil... | 07/10/2007 |
| 7227240 | Semiconductor device with wire bond inductor and method A semiconductor device (10) includes a semiconductor die (20) and an inductor (30, 50) formed with a bonding wire (80) attached to a top surface (21) of the semiconductor die. The bonding wire is extended laterally a distance (L... | 06/05/2007 |
| 7227246 | Matching circuits on optoelectronic devices An apparatus comprises a first substrate and a second substrate. The first substrate includes an optoelectronic device and a matching circuit. The second substrate includes a driver circuit. A frequency response of the optoelectronic device is changed by the matchin... | 06/05/2007 |
| 7224053 | Semiconductor device responsive to different levels of input and output signals and signal processing system using the same A semiconductor device which integrates a plurality of semiconductor chips into a single package includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip includes a plurality of first bonding pads outputting first signals hav... | 05/29/2007 |
| 7205671 | Semiconductor device A semiconductor device has peripheral electrode pads formed on the periphery of a semiconductor chip, land pads comprising the first land pads and the second land pads formed on the semiconductor chip, and circuits formed in the semiconductor chip. The peripheral el... | 04/17/2007 |
| 7199458 | Stacked offset semiconductor package and method for fabricating In the stacked semiconductor package, on a first semiconductor chip, a second semiconductor chip is stacked offset such that a portion of the first semiconductor chip is exposed. At least one first conductor electrically connects the exposed portion of the first sem... | 04/03/2007 |
| 7199469 | Semiconductor device having stacked semiconductor chips sealed with a resin seal member The cost of a semiconductor device is to be reduced. An electrical connection between a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip is made through an inner lead portion of a lead disposed at a position around the... | 04/03/2007 |
| 7187071 | Composite electronic component A composite electronic component having a multi-layer wiring board, a first power terminal electrode, a second power terminal electrode, an external connection power supply terminal, a surface-mounted component, an insulator, and a power supply pattern. The first an... | 03/06/2007 |
| 7183616 | High speed switching MOSFETS using multi-parallel die packages with/without special leadframes This invention discloses a method for configuring a power MOSFET package by packaging several paralleled and separated MOSFET chips in the assembly. The method further includes a step of connecting the gate pad on each of these MOSFET chips with a low-resistance gat... | 02/27/2007 |
| 7176575 | Input/output routing on an electronic device An electronic device includes a material having a first dielectric constant (K) value, and a material having a second dielectric constant (K) value. The first dielectric constant (K) value is lower than the second dielectric constant (K) value. The electronic device... | 02/13/2007 |
| 7176487 | Semiconductor integrated circuit To provide a test technology capable of reducing a package size by reducing a number of terminals (pins) in a semiconductor integrated circuit of SIP or the like constituted by mounting a plurality of semiconductor chips to a single package, in SIP 102 consti... | 02/13/2007 |
| 7176129 | Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications are used to fabricate two structures: (1) a first structure includes porous Si (silicon) regions extending throughout the thickness of an Si substrate that ... | 02/13/2007 |
| 7170114 | Semiconductor device A chip size is remarkably reduced by providing effective layout of the I/O buffers. Since a large capacity non-volatile memory is arranged, bonding pads are arranged at the area near each side of the rectangular shape semiconductor chip and the I/O buffers are arran... | 01/30/2007 |
| 7132752 | Semiconductor chip and semiconductor device including lamination of semiconductor chips To prevent short-circuit due to contact of bonding wires each other and to make a semiconductor device compact. A semiconductor chip with a rectangular main surface may comprise: a first side composing the main surface; a second side opposed to the first side; a mai... | 11/07/2006 |
| 7129567 | Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements Methods of forming at least one multiconductor via are disclosed. Specifically, a substrate may be provided and at least one through-hole may be formed therethrough. At least one seed layer may be formed, patterned, and a metal may be deposited thereon to form a plu... | 10/31/2006 |
