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| Number | Title | Issue Date |
| 7271486 | Retarding agglomeration of Ni monosilicide using Ni alloys A method for providing a low resistance non-agglomerated Ni monosilicide contact that is useful in semiconductor devices. Where the inventive method of fabricating a substantially non-agglomerated Ni alloy monosilicide comprises the steps of: forming a metal alloy l... | 09/18/2007 |
| 6864579 | Carrier with a metal area and at least one chip configured on the metal area A carrier has a metal area that is essentially composed of copper. A chip has a rear side metallization layer. A buffer layer, essentially composed of nickel and having a thickness of between 5 μm and 10 μm, is arranged on the metal area. The chip does not have a ... | 03/08/2005 |
| 6614110 | Module with bumps for connection and support An electronic packaging module for inverted bonding of electronic devicss including semiconductor devices, integrated circuits, application specific integrated circuits, electomechanical devices and MEMS is produced with protuberances on the conductive pa... | 09/02/2003 |
| 6555762 | Electronic package having substrate with electrically conductive through holes filled with polymer and conductive composition The present invention provides a unique, high density, electronic package having a conductive composition for filling vias or through holes to make reliable vertical or Z-connects from a dielectric layer to adjacent electrical circuits. The through holes ... | 04/29/2003 |
| 6528769 | Connection of a junction to an electrical conductor track on a plate A connection of an electrical terminal 13 to a conductor track 5 applied to a glass or glass ceramic plate 1 is to be resistant to temperature change and traction and conductive. For this purpose an electrically conductive connecting element 11 is ultraso... | 03/04/2003 |
| 6468905 | Methods of restricting silicon migration Methods of forming refractory metal silicide components are described. In accordance with one implementation, a refractory metal layer is formed over a substrate. A silicon-containing structure is formed over the refractory metal layer and a silicon diffu... | 10/22/2002 |
| 6424046 | Substrate for manufacturing a semiconductor device with three element alloy The substrate according to the present invention is comprised of a silver/gold/grain element alloy layer, wherein the alloy forms an outside layer of the product. The grain element is selected from a group consisting of selenium, antimony, bismuth, nickel... | 07/23/2002 |
| 6404063 | Die-to-insert permanent connection and method of forming The invention disclosed herein is a semiconductor die assembly and method of making the same having a die and insert substrate that are electrically interconnected by diffusing gold bumps attached to the connecting surface of the substrate to aluminum-bas... | 06/11/2002 |
| 6399475 | Process for producing electrical connections on the surface of a semiconductor package with electrical-connection drops Process for producing electrical connections on the surface of a semiconductor package containing an integrated-circuit chip and having metal electrical-connection regions on the surface of the package, consisting of: covering these connection regions wit... | 06/04/2002 |
| 6387714 | Die-to-insert permanent connection and method of forming The invention disclosed herein is a semiconductor die assembly and method of making the same having a die and insert substrate that are electrically interconnected by diffusing gold bumps attached to the connecting surface of the substrate to aluminum-bas... | 05/14/2002 |
| 6352925 | Method of making electrical conductor system for semiconductor device A semiconductor device is provided with copper traces for connecting active elements to an external device, and insulating layers of black oxide (cupric oxide) are formed on the traces. The active elements may be, for example, conductors on the active sur... | 03/05/2002 |
| 6331347 | Method for forming a gold plating electrode a substrate based on the electrode forming method, and a wire bonding method utilizing this electrode forming method A circuit pattern 2a, made of copper foil, is arranged on a substrate 1. A nickel-containing barrier metal layer 2b is formed on the circuit pattern 2a. A gold layer 2c is formed on the barrier metal layer 2b by electroless substitution plating. Then, sub... | 12/18/2001 |
| 6323554 | Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during... | 11/27/2001 |
| 6320138 | Substrate with conductor formed of low-resistance aluminum alloy A wiring substrate is disclosed, which has optimal characteristics for, for example, an active matrix type liquid crystal display device with a thin film transistor. Wiring formed of an Al-Nd-Ti alloy thin film is formed on a glass substrate, and if neces... | 11/20/2001 |
| 6313411 | Wafer level contact sheet and method of assembly The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses including wafer level burn-in (WLBI), diced die burn-in (DDBI), an... | 11/06/2001 |
| 6280828 | Flexible wiring board A flexible wiring board including a gold pad having dynamic Vickers hardness of not less than 50 or having a ratio of amount of nickel in a surface of the gold pad (atomic weight %) to thickness of gold (μm) of not more than 5 or having both the dynamic ... | 08/28/2001 |
| 6250541 | Method of forming interconnections on electronic modules A method which utilizes flip chip technology to provide interconnection between printed circuit boards and integrated circuits is disclosed. The method involves metallization of the bond pad and multiple, novel bump compositions and coating compositions t... | 06/26/2001 |
| 6221427 | Interface regions between metal and ceramic in a metal/ceramic substrate Structures, and methods of fabrication thereof, are described wherein between an electrically conducting region and a ceramic region there is an interface region which has a thermal coefficient of expansion which is intermediate between the thermal coeffi... | 04/24/2001 |
| 6178082 | High temperature, conductive thin film diffusion barrier for ceramic/metal systems A multilayer ceramic substrate having a thin film structure containing capacitor connected thereto is provided as an interposer capacitor, the capacitor employing platinum as the bottom electrode of the capacitor. In a preferred capacitor, a dielectric ma... | 01/23/2001 |
| 6153928 | Substrate for semiconductor package, fabrication method thereof, and stacked-type semiconductor package using the substrate A substrate for a semiconductor package, a fabrication method for the substrate, thereof and a stacked-type semiconductor package using the substrate, and a method of making the package are disclosed. The substrate includes: an insulator having top and bo... | 11/28/2000 |
| 6147402 | Refractory metal capped low resistivity metal conductor lines and vias Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during... | 11/14/2000 |
| 6143399 | Aromatic polyimide film An aromatic polyimide film which is favorably employed for preparing a laminate of an aromatic polyimide film, an adhesive layer, and an electroconductive sheet is made of a polyimide prepared from a tetracarboxylic acid component containing at least 15 m... | 11/07/2000 |
| 6133638 | Die-to-insert permanent connection and method of forming The invention disclosed herein is a semiconductor die assembly and method of making the same having a die and insert substrate that are electrically interconnected by diffusing gold bumps attached to the connecting surface of the substrate to aluminum-bas... | 10/17/2000 |
| 6127270 | Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure Methods of forming refractory metal silicide components are described. In accordance with one implementation, a refractory metal layer is formed over a substrate. A silicon-containing structure is formed over the refractory metal layer and a silicon diffu... | 10/03/2000 |
| 6120915 | Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure Methods of forming refractory metal silicide components are described. In accordance with one implementation, a refractory metal layer is formed over a substrate. A silicon-containing structure is formed over the refractory metal layer and a silicon diffu... | 09/19/2000 |
| 6082610 | Method of forming interconnections on electronic modules A method which utilizes flip chip technology to provide interconnection between printed circuit boards and integrated circuits is disclosed. The method involves metallization of the bond pad and multiple, novel bump compositions and coating compositions t... | 07/04/2000 |
| 6084282 | Low-stress and low-sensitivity metal film A thin-film coupled to a substrate includes a first layer and a second layer. Both layers are made of the same material, which is either a transition or a refractory metal. The first layer is doped by nitrogen and the second layer is not. The thin-film ha... | 07/04/2000 |
| 6063506 | Copper alloys for chip and package interconnections Copper alloys containing between 0.01 and 10 weight percent of at least one alloying element selected from carbon, indium and tin for improved electromigration resistance, low resistivity and good corrosion resistance that can be used in chip and package ... | 05/16/2000 |
| 6043859 | Active matrix base with reliable terminal connection for liquid crystal display device An active matrix base presented can be readily manufactured using existing fabrication technologies, and driven by either sequential-stagger TFT or reverse-stagger TFT. The bonded interface of the matrix base has low values of electrical resistance in the... | 03/28/2000 |
| 6011313 | Flip chip interconnections on electronic modules A device which utilizes flip chip technology to provide interconnection between printed circuit boards and integrated circuits is disclosed. The method involves metallization of the bond pad and multiple, novel bump compositions and coating compositions t... | 01/04/2000 |
| 6006427 | Chip-on-board printed circuit manufacturing process using aluminum wire bonded to copper pads In a process for fabricating a printed circuit board assembly carrying a chip on board type microcircuit package, aluminum wires are bonded to the aluminum pads on the microcircuit and to bare copper connector pads on the printed circuit board to form the... | 12/28/1999 |
| 5990564 | Flip chip packaging of memory chips The specification describes an interconnect strategy for memory chip packages to reduce or eliminate alpha particle contamination from the use of high lead solder interconnections in the vicinity of semiconductor memory cells. In the primary embodiment a ... | 11/23/1999 |
| 5976975 | Refractory metal capped low resistivity metal conductor lines and vias Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the-hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during... | 11/02/1999 |
| 5958600 | Circuit board and method of manufacturing the same Disclosed are a highly reliable circuit board and a method of stably manufacturing the circuit board, wherein an insulator made from a specific organic insulating material is provided under a highly stressed conductor for preventing occurrence of cracks i... | 09/28/1999 |
| 5912506 | Multi-layer metal sandwich with taper and reduced etch bias and method for forming same A multi-layer metal sandwich structure with taper and reduced etch bias formed on a substrate includes a first metal layer formed on the substrate and a second metal layer formed on the first metal layer. The width of the first metal layer is greater than... | 06/15/1999 |
| 5904499 | Package for power semiconductor chips An electronic packaging module for bonding of power semiconductor devices is produced. The semiconductor device is mounted on a base, and enclosed by a frame and lid. The lid is an insulating substrate having a conductive pattern with protuberances on the... | 05/18/1999 |
| 5902472 | Aqueous solution for forming metal complexes, tin-silver alloy plating bath, and process for producing plated object using the plating bath A tin-silver alloy plating solution having a tin compound, a silver compound, and a complexing agent including a pyrophosphoric compound and an iodic compound. The tin-silver alloy layer composition can achieve a high electric current efficiency without u... | 05/11/1999 |
| 5897724 | Method of producing a hybrid integrated circuit A multilayer substrate is constituted by laminating a plurality of sheet substrates, the respective sheet substrates are constituted by forming conductive layers of a refractory metal such as W on ceramic green sheets composed mainly of an alumina ceramic... | 04/27/1999 |
| 5898222 | Capped copper electrical interconnects The present invention relates generally to a new structure and method for capped copper electrical interconnects. More particularly, the invention encompasses a novel structure in which one or more of the copper electrical interconnects within a semicondu... | 04/27/1999 |
| 5889328 | Refractory metal capped low resistivity metal conductor lines and vias Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during... | 03/30/1999 |
