"The Americans have need of the telephone, but we do not. We have plenty of messenger boys."
Sir William Preece, chief engineer, British Post Office ; 1878
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7420270 | Tape wiring substrate and chip-on-film package using the same A chip-on-film package may include a tape wiring substrate, a semiconductor chip mounted on the tape wiring substrate, and a molding compound provided between the semiconductor chip and the tape wiring substrate. The tape wiring substrate may include a film having u... | 09/02/2008 |
| 7414308 | Integrated circuit with offset pins An integrated circuit comprises a package and having adjacent connection pins on two opposite sides of the package, with every second connection pin being inwardly bent so that the connection pins are offset. The ends of the inwardly bent connection pins and the end... | 08/19/2008 |
| 7402904 | Semiconductor device having wires that vary in wiring pitch A semiconductor device includes a first wiring layer having a first wiring pitch and a second wiring layer having a second wiring pitch that differs from the first wiring pitch. The device further includes a third wiring layer which connects the first wiring layer a... | 07/22/2008 |
| 7394152 | Wafer level chip size packaged chip device with an N-shape junction inside and method of fabricating the same The present invention provide a wafer level chip size packaged chip device with a N-shape junction at which external leads electrically connect to peripheral arrayed compatible pads and a method of fabricating the same. In the wafer level chip size package, with suc... | 07/01/2008 |
| 7385284 | Transponder incorporated into an electronic device An electronic device. The device comprises a metalization layer and an integrated circuit chip incorporated into the device wherein the integrated circuit chip is capacitively coupled to the metalization layer. The device comprises a first substrate having the metal... | 06/10/2008 |
| 7382050 | Semiconductor device and method for producing the same A semiconductor device includes a tape carrier substrate having a flexible insulating film base, a plurality of conductor wirings provided on the film base, and wiring bumps respectively formed so as to cover an upper surface and both side surfaces of the conductor ... | 06/03/2008 |
| 7375421 | High density multilayer circuit module Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit modul... | 05/20/2008 |
| 7371687 | Electronic circuit device An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a... | 05/13/2008 |
| 7372139 | Semiconductor chip package A semiconductor chip package may include a substrate, which may have bonding pads formed thereon. A semiconductor chip mounted on the substrate may have chip pads, and electrical connections for connecting the chip pads of the semiconductor chip to the substrate bon... | 05/13/2008 |
| 7339260 | Wiring board providing impedance matching A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via... | 03/04/2008 |
| 7332818 | Multi-chip electronic package with reduced line skew and circuitized substrate for use therein An electronic package which includes a circuitized substrate having at least two electrical components positioned thereon. The package includes patterns of contact sites, each for having one of the components coupled thereto. The patterns of contact sites in turn ar... | 02/19/2008 |
| 7319272 | Ball assignment system A pattern of contacts that includes high speed transmitter contacts disposed in a first portion of the pattern, where the high speed transmitter contacts are disposed in transmitter differential pairs. High speed receiver contacts are disposed in a second portion of... | 01/15/2008 |
| 7298040 | Wire bonding method and apparatus for integrated circuit Wire bonding methods and apparatuses are described herein. In one aspect of the invention, an exemplary apparatus includes a plurality of electrically conductive contacts disposed on a surface of the IC device, the plurality of electrically conductive contacts being... | 11/20/2007 |
| 7298036 | Scaling of functional assignments in packages A family of package substrates adapted to receive a family of integrated circuits having different sizes and provide electrical connections between the integrated circuits and a circuit board. Each package substrate in the family includes a package substrate having ... | 11/20/2007 |
| 7294853 | Substrate for mounting a semiconductor A substrate (1) is formed from a non-electrically conducting material and is for mounting a semiconductor chip (10). The substrate has a semiconductor chip mounting portion (6). A number of first electrically conducting contact portions (5 | 11/13/2007 |
| 7288832 | Chip-mounted film package A chip-mounted film package includes a base film, an effective film package defined on the base film by a cutting line, a driving chip mounted on the effective film package, a plurality of input pads arranged on an input area of the effective film package and connec... | 10/30/2007 |
| 7285850 | Support elements for semiconductor devices with peripherally located bond pads A support structure for a semiconductor device with peripherally disposed contacts includes a support substrate and at least one conductive column protruding from the support substrate. The at least one conductive column is configured to contact an outer connector o... | 10/23/2007 |
| 7282805 | Bond pad rerouting element and stacked semiconductor device assemblies including the rerouting element A rerouting element for a semiconductor device includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device wit... | 10/16/2007 |
| 7274109 | Modular bonding pad structure and method A semiconductor die includes a plurality of drivers and a plurality of bonding pads. Each driver is formed by a plurality of interconnected modules and has an associated bonding pad to which at least one of the modules of the driver is electrically connected. The mo... | 09/25/2007 |
| 7262496 | Wiring base with wiring extending inside and outside of a mounting region A method for manufacturing a semiconductor device is provided. A resin paste is applied to a wiring base including a wiring pattern. Then, a semiconductor chip having a plurality of electrodes is mounted to the wiring base. The electrodes and the wiring pattern face... | 08/28/2007 |
| 7239024 | Semiconductor package with recess for die A semiconductor package is disclosed with a recess (51) for an integrated circuit die (52). The recess is made by bending or deforming all layers of a package substrate, and therefore the recess contains circuitry to connect to the integrated circuit d... | 07/03/2007 |
| 7235879 | Semiconductor device and method of manufacturing the same, electronic device and method of manufacturing the same, and electronic instrument A semiconductor device including: a semiconductor substrate in which an integrated circuit is formed; an insulating layer formed on the semiconductor substrate and having a first surface and a second surface which is higher than the first surface; a first electrode ... | 06/26/2007 |
| 7199477 | Multi-tiered lead package for an integrated circuit A package for a semiconductor die comprises a semiconductor die with a bond pad. The package further includes a package lead and a bond wire with a first end portion coupled to the package lead, a second end portion coupled to the bond pad, and an intermediate porti... | 04/03/2007 |
| 7157789 | Semiconductor device and method for manufacturing the same An example of a semiconductor device of the present invention includes a first semiconductor element including a first element body portion and a first element electrode that is provided on a first face of the first element body portion; a wiring board including an ... | 01/02/2007 |
| 7144758 | Manufacturing method of semiconductor device, including differently spaced bump electrode arrays First bump electrodes are arrayed in a straight line along a first side of a semiconductor chip. Second bump electrodes are more narrowly arrayed in a zigzag arrangement along a second side of the chip. By carrying out an injection of a sealing resin from the second... | 12/05/2006 |
| 7132746 | Electronic assembly with solder-bonded heat sink A process and electronic assembly for conducting heat from a semiconductor circuit device mounted to a substrate. The substrate is supported by a housing member equipped with a heat-conductive member. A surface of the device opposite the substrate is bonded to the h... | 11/07/2006 |
| 7122906 | Die-wafer package and method of fabricating same A die-wafer package includes a singulated semiconductor die having a first plurality of bond pads on a first surface and a second plurality of bond pads on a second opposing surface thereof. Each of the first and second pluralities of bond pads includes an under-bum... | 10/17/2006 |
| 7087943 | Direct alignment scheme between multiple lithography layers A method for directly aligning multiple lithography masking layers. The method may be used to fabricate a flash plus logic structure. The flash plus logic structure may comprise a flash memory cell, a logic cell and a transistor. ... | 08/08/2006 |
| 7075179 | System for implementing a configurable integrated circuit The present invention provides a system for implementing a configurable integrated circuit (IC). Aspects of the invention include an IC die; a plurality of input/outputs (I/Os) coupled to the IC die; and a plurality power planes coupled to the IC die for providing p... | 07/11/2006 |
| 6979896 | Power gridding scheme An electrical device includes electrical contact pads, a supply voltage bus and an interconnection circuit. The electrical contact pads receive a supply voltage, and the bus is electrically connected to the electrical contact pads. For each electrical contact pad, t... | 12/27/2005 |
| 6981090 | Multiple use of microcontroller pad A circuit arrangement permits a microcontroller wirebond pad to be configured to be an analog or digital input or output. The circuit arrangement uses any of a plurality of switching configurations to selectively determine the use of the wirebond pad under control o... | 12/27/2005 |
| 6965170 | High wireability microvia substrate The escape of signals from a semiconductor chip to a printed wiring board in a flip chip/ball grid array assembly is improved by repositioning the signals from the chip through the upper signal layers of the carrier. This involves fanning out the circuit lines throu... | 11/15/2005 |
| 6860006 | Method for manufacturing a monolithic ceramic electronic component A monolithic electronic component includes a composite body having a plurality of stacked ceramic layers. The ceramic layers include interconnecting conductors provided in each of the ceramic layers, including first terminals, arranged on a first end surface in the ... | 03/01/2005 |
| 6703714 | Methods for fabricating flip-chip devices and preventing coupling between signal interconnections A method and apparatus for substantially reducing the need for capacitive and inductive compensation for signal lines on a flip-chip semiconductor device. A flip-chip semiconductor device is disclosed having signal lines of substantially equal lengths. At... | 03/09/2004 |
| 6699734 | Method and apparatus for coupling a semiconductor die to die terminals A method and apparatus for coupling a semiconductor die to terminals of a die package in which the die is housed. The apparatus comprises a die having first and second terminals. A first conductive member is elongated between a first end portion and a sec... | 03/02/2004 |
| 6699737 | Method of manufacturing a semiconductor device Salient electrodes on a semiconductor chip and leads on a film substrate are to be connected together with a high accuracy. A change in lead pitch which occurs at the time of connecting salient electrodes on a semiconductor chip and inner leads on a film ... | 03/02/2004 |
| 6700208 | Surface mounting substrate having bonding pads in staggered arrangement A surface mounting substrate is configured to surface mount a semiconductor element thereon, the semiconductor element having a plurality of protruding electrodes arranged in a staggered arrangement of two rows. A plurality of bonding pads formed on a sub... | 03/02/2004 |
| 6696669 | Circuit and method for heating an adhesive to package or rework a semiconductor die System for attaching a die to the die pad of a lead frame incorporating a resistive heating circuit into the die pad which heats up to cure an epoxy adhesive between the die and the pad and thereby attach the die to the pad. The heating circuit also heats... | 02/24/2004 |
| 6696751 | Semiconductor device and portable device having a mounting region sharing point symmetry In conventional semiconductor devices, customarily, it is sought to position the mounting region of a semiconductor element in the center of a package, and hence the dimensions of the package are increased unnecessarily, but the object of the present inve... | 02/24/2004 |
| 6693359 | High density wire bonding pads for semiconductor package A semiconductor package, which is to attach an electric device, such as a die, thereon and electrically connect therewith, has a substrate with a conductor pattern thereon. The conductor pattern consists of a plurality of traces in a specific layout. The ... | 02/17/2004 |