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| Number | Title | Issue Date |
| 7443030 | Thin silicon based substrate Embodiments of the invention provide a device with a die and a substrate having a similar coefficient of thermal expansion to that of the die. The substrate may comprise a silicon base layer. Build up layers may be formed on the side of the base layer further from t... | 10/28/2008 |
| 7400035 | Semiconductor device having multilayer printed wiring board A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed ... | 07/15/2008 |
| 7385281 | Semiconductor integrated circuit device A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a ... | 06/10/2008 |
| 7385283 | Three dimensional integrated circuit and method of making the same A three dimensional integrated circuit structure includes at least first and second devices, each device comprising a substrate and a device layer formed over the substrate, the first and second devices being bonded together in a stack, wherein the bond between the ... | 06/10/2008 |
| 7375421 | High density multilayer circuit module Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit modul... | 05/20/2008 |
| 7339260 | Wiring board providing impedance matching A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via... | 03/04/2008 |
| 7274093 | Semiconductor device connector, semiconductor device carrier, semiconductor device socket using the same and probe card A semiconductor device carrier comprising; a carrier housing having a housing portion for accommodating a semiconductor device; an electrode sheet disposed in the carrier housing, having a front surface wiring conductively arranged on a front surface of an insulatio... | 09/25/2007 |
| 7227258 | Mounting structure in integrated circuit module Embodiments of the present invention may include an integrated circuit module structure for a high-density mounting. An embodiment may include a wiring board, having a mounting space with a mounting length determined in a first direction and a mounting width determi... | 06/05/2007 |
| 7224062 | Chip package with embedded panel-shaped component A bump-less chip package is provided. The bump-less chip package includes a chip, an interconnection structure and a panel-shaped component. The panel-shaped component has a plurality of electrical terminals on a first surface thereof. The back surface of the chip i... | 05/29/2007 |
| 7196426 | Multilayered substrate for semiconductor device A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connect... | 03/27/2007 |
| 7180162 | Arrangement for reducing stress in substrate-based chip packages An arrangement reduces stress in substrate-based chip packages, in particular of Ball Grid Arrays (BGA) with rear-side and/or edge protection. The chip is firmly connected to a substrate, which is provided on the side that is opposite from the chip with conducting t... | 02/20/2007 |
| 7148564 | Dual-sided substrate integrated circuit package including a leadframe having leads with increased thickness An integrated circuit package includes a first non-conductive substrate having a first inner surface and a second non-conductive substrate having a second inner surface. A die having a first thickness is disposed between the first and second inner surfaces. A leadfr... | 12/12/2006 |
| 7145226 | Scalable microelectronic package using conductive risers This invention relates to an apparatus and methods for increasing the microelectronic package density by stacking multiple microelectronic packages in an array and controlling package to package scalability without stressing the carrier substrates and without limiti... | 12/05/2006 |
| 7115990 | Bumped die and wire bonded board-on-chip package An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface with at least one opening therethrough. The die includes an active sur... | 10/03/2006 |
| 7098528 | Embedded redistribution interposer for footprint compatible chip package conversion An embedded redistribution interposer is disclosed for providing footprint compatible chip package migration in which a die designed to be mounted into chip package is originally implemented using a first type of silicon platform and is subsequently redesigned for a... | 08/29/2006 |
| 7071569 | Electrical package capable of increasing the density of bonding pads and fine circuit lines inside a interconnection An electrical package and manufacturing method thereof is provided. A high stiffness, high electrical conductivity, low coefficient of thermal expansion and high thermal conductivity support substrate is used as an initial layer for building the package. A multilaye... | 07/04/2006 |
| 6894392 | Scaleable integrated data processing device A scaleable integrated data processing device, particularly a microcomputer, comprises a processing unit with one or more processors and a storage unit with one or more memories. The data processing device is provided on a carrier substrate (S) and comprises mutuall... | 05/17/2005 |
| 6757968 | Chip scale packaging on CTE matched printed wiring boards A circuit assembly has a heat sink assembly and a chip scale package assembly. The chip scale package assembly has an integrated circuit die coupled to a first printed wiring board. The heat sink assembly has an integrated circuit die coupled to a second printed wir... | 07/06/2004 |
| 6697261 | Multileveled printed circuit board unit including substrate interposed between stacked bumps Conductive or solder bumps are stacked between a mounted component such as a BGA device and a printed wiring substrate in a multileveled printed circuit board unit. An interposer or relay substrate is interposed between the adjacent stacked conductive bum... | 02/24/2004 |
| 6678949 | Process for forming a multi-level thin-film electronic packaging structure A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on o... | 01/20/2004 |
| 6676784 | Process for the manufacture of multilayer ceramic substrates A process for the manufacture of a multilayer ceramic substrate includes fabricating the multilayer ceramic substrate from a monolith fabricated from universal layers and a monolith fabricated from custom layers. The universal layer monolith and the custo... | 01/13/2004 |
| 6661088 | Semiconductor integrated circuit device having interposer and method of manufacturing the same A semiconductor integrated circuit device has a semiconductor chip, interposer, and substrate. The semiconductor chip has a plurality of first pads arranged at first pitches on a surface. The interposer has a first surface and a second surface. On the fir... | 12/09/2003 |
| 6656827 | Electrical performance enhanced wafer level chip scale package with ground A method including providing a first substrate having a first bond pad and a second bond pad; forming a subassembly comprising securing a second substrate to the first substrate with a ground layer interposed between the first substrate and the second sub... | 12/02/2003 |
| 6653736 | Multilayer flexible wiring boards A multilayer flexible wiring board, suited for mounting semiconductor elements. The flexible wiring board is fabricated in the following manner. A flexible wiring board piece having a metal wiring, in which a metal coating is exposed on at least a part of... | 11/25/2003 |
| 6653575 | Electronic package with stacked connections and method for making same An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates ... | 11/25/2003 |
| 6638607 | Method and structure for producing Z-axis interconnection assembly of printed wiring board elements A method of forming a member for joining to form a composite wiring board. The member includes a dielectric substrate. Adhesive tape is applied to at least one face of said substrate. At least one opening is formed through the substrate extending from one... | 10/28/2003 |
| 6639302 | Stress reduction in flip-chip PBGA packaging by utilizing segmented chip carries A method and structure to electrically couple a semiconductor device to a substrate that is divided into a plurality of segments. Alternatively, a semiconductor device may be divided into a plurality of segments and the plurality of segments are electrica... | 10/28/2003 |
| 6632734 | Parallel plane substrate A microelectronic substrate having a plurality of alternating substantially planar layers of dielectric material and conductive material, and further having a first surface and a second surface, wherein the dielectric material and the conductive material ... | 10/14/2003 |
| 6627978 | Chip package enabling increased input/output density A device and method for increasing input/output from a die by making electrically conductive microvias connecting the integrated circuit with a backside of the die. The backside electrically conductive microvias connect an integrated circuit in the die to... | 09/30/2003 |
| 6618938 | Interposer for semiconductor package assembly The present invention describes an interposer which improves the thermal performance of a semiconductor device. The interposer may be situated between a substrate and a board. The interposer is attached to two layers of solder balls. The first layer of so... | 09/16/2003 |
| 6621011 | Electronic chip component An electronic chip component includes a package provided with external electrodes having excellent heat resistance and adhesion. In the electronic chip component, a package includes heat-resistant resin molding, and the external electrodes are provided on... | 09/16/2003 |
| 6617528 | Electronic package with stacked connections and method for making same An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates ... | 09/09/2003 |
| 6617687 | Method of forming a test insert for interfacing a device containing contact bumps with a test substrate An insert is provided for testing a chip-scale-packaged microelectronic device having an encapsulant-protrusion and a ball-grid-array of outwardly-projecting contacts. The insert comprises a substrate of mono-crystalline silicon. Walls of the substrate de... | 09/09/2003 |
| 6614106 | Stacked circuit device and method for evaluating an integrated circuit substrate using the stacked circuit device A stacked circuit device comprises a base substrate having a terminal, an interposer arranged on the base substrate and formed of a semiconductor substrate, the interposer having a first terminal connected to the terminal of the base substrate, a second t... | 09/02/2003 |
| 6614103 | Plastic packaging of LED arrays There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a c... | 09/02/2003 |
| 6594891 | Process for forming multi-layer electronic structures A process of forming a multi-layer electronic composite structure. The process includes providing at least one core including at least one plane of at least one electrically conducting material with a plane of at least one electrically insulating material... | 07/22/2003 |
| 6594153 | Circuit package for electronic systems A circuit package has been described for routing long traces between an electronic circuit, such as a phase locked loop, and external circuit components. The traces are routed through two substrates. In each substrate, the traces are routed primarily on a... | 07/15/2003 |
| 6581280 | Method for filling high aspect ratio via holes in electronic substrates High aspect ratio (5:1-30:1) and small (5 μm-125 μm) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodimen... | 06/24/2003 |
| 6582616 | Method for preparing ball grid array board Disclosed are a method for preparing a high performance BGA board containing a plurality of printed circuit boards in which a conductor circuit, a bonding pad electrically connected to a semiconductor chip, and an inner hole for mounting a semiconductor c... | 06/24/2003 |
| 6574113 | Electronic package with stacked connections and method for making same An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates ... | 06/03/2003 |
