Pet Toilet-Like Water Disk and Food Storage
One pet-friendly inventor patented "a device for watering pets, e.g., a dog or cat." The device, he helpfully noted, "has the general shape of a toilet."
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7432596 | Apparatus and method for bonding silicon wafer to conductive substrate A system and method is disclosed for bonding a substrate to a semiconductor die that is prone to curling when subjected to an elevated temperature in a solder reflow oven, for example, thereby improving the electrical and mechanical bonding for large dies, wafers, c... | 10/07/2008 |
| 7420262 | Electronic component and semiconductor wafer, and method for producing the same The invention relates to an electronic component and a semiconductor wafer, and a method for producing them. The semiconductor wafer has strip-type separating regions. The separating regions are provided with through contacts in the direction of the rear side of the... | 09/02/2008 |
| 7414308 | Integrated circuit with offset pins An integrated circuit comprises a package and having adjacent connection pins on two opposite sides of the package, with every second connection pin being inwardly bent so that the connection pins are offset. The ends of the inwardly bent connection pins and the end... | 08/19/2008 |
| 7391110 | Apparatus for providing capacitive decoupling between on-die power and ground conductors One embodiment of the present invention provides capacitive decoupling on the surface of a semiconductor die, instead of providing the decoupling on a package or printed circuit board to which the semiconductor die is attached. In this embodiment, a surface of a sem... | 06/24/2008 |
| 7385281 | Semiconductor integrated circuit device A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a ... | 06/10/2008 |
| 7385286 | Semiconductor module At least four terminal electrodes are provided on a surface of multi-layer substrate main body. An electric functional layer is selectively provided at an internal area of said multi-layer substrate placed at a downward position of all terminal electrodes in a subst... | 06/10/2008 |
| 7375022 | Method of manufacturing wiring board A method of manufacturing a wiring board is disclosed. The wiring board has: a capacitor, having multiple electrode layers which oppose each other with a dielectric layer in between, that is connected to a semiconductor chip; one or more via wirings which pierce the... | 05/20/2008 |
| 7352060 | Multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring substrate A multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring structure is disclosed. The multilayer wiring substrate includes a dielectric layer including a resin material mixed with an inorganic filler, wherein the inorganic filler i... | 04/01/2008 |
| 7339260 | Wiring board providing impedance matching A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via... | 03/04/2008 |
| 7294904 | Integrated circuit package with improved return loss A packaged integrated circuit includes an integrated circuit and a package substrate. A trace in the package substrate includes a first portion and a second, high-inductance, portion. The high-inductance portion of the trace is proximate to a port of the integrated ... | 11/13/2007 |
| 7253504 | Integrated circuit package and method An integrated circuit package includes a substrate having a central axis dividing the substrate into an upper half and a lower half and an integrated circuit coupled to the substrate. A layer is provided within the substrate in the lower half thereof that is configu... | 08/07/2007 |
| 7253505 | IC substrate with over voltage protection function The present invention relates to an IC substrate provided with over voltage protection functions and thus, a plurality of over voltage protection devices are provided on a single substrate to protect an IC chip directly. According to the present invention, there is ... | 08/07/2007 |
| 7240425 | Method of making an electrical connection to a conductor on an inner layer of a multi-layer printed circuit board What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to ... | 07/10/2007 |
| 7240429 | Manufacturing method for a printed circuit board A conductor pattern is formed on a resin film which is made of a thermoplastic resin. Each single-sided conductor pattern film has via-holes filled with an electrically conductive paste. A printed conductor pattern and a printed resistor are formed on a ceramic subs... | 07/10/2007 |
| 7230332 | Chip package with embedded component A chip package is provided. The chip package includes at least one chip, an interconnection structure, a plurality of second pads and at least one panel-shaped component, wherein the chip includes a plurality of first pads on a surface thereof. The interconnection s... | 06/12/2007 |
| 7227240 | Semiconductor device with wire bond inductor and method A semiconductor device (10) includes a semiconductor die (20) and an inductor (30, 50) formed with a bonding wire (80) attached to a top surface (21) of the semiconductor die. The bonding wire is extended laterally a distance (L... | 06/05/2007 |
| 7227246 | Matching circuits on optoelectronic devices An apparatus comprises a first substrate and a second substrate. The first substrate includes an optoelectronic device and a matching circuit. The second substrate includes a driver circuit. A frequency response of the optoelectronic device is changed by the matchin... | 06/05/2007 |
| 7224046 | Multilayer wiring board incorporating carbon fibers and glass fibers A multilayer wiring board (X1) comprises a core portion (100) and out-core wiring portion (30). The core portion (100) comprises a carbon fiber reinforced portion (10) composed of a carbon fiber material (11) and resin compo... | 05/29/2007 |
| 7221048 | Multilayer circuit carrier, panel, electronic device, and method for producing a multilayer circuit carrier A multilayer circuit carrier, electronic devices and panel, and a method for producing a multilayer circuit carrier include at least one semiconductor chip, at least one rewiring layer with a rewiring structure, and at least one insulation layer, which has passage s... | 05/22/2007 |
| 7208403 | Tile-based routing method of a multi-layer circuit board and related structure A method for routing a plurality of signal traces out of a plurality of corresponding bumper pads for implementation of a die on a multi-layer circuit board includes utilizing the plurality of bumper pads positioned in a periphery area of the die; utilizing a plural... | 04/24/2007 |
| 7196426 | Multilayered substrate for semiconductor device A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connect... | 03/27/2007 |
| 7164198 | Multilayered substrate for semiconductor device A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connect... | 01/16/2007 |
| 7071569 | Electrical package capable of increasing the density of bonding pads and fine circuit lines inside a interconnection An electrical package and manufacturing method thereof is provided. A high stiffness, high electrical conductivity, low coefficient of thermal expansion and high thermal conductivity support substrate is used as an initial layer for building the package. A multilaye... | 07/04/2006 |
| 7009296 | Semiconductor package with substrate coupled to a peripheral side surface of a semiconductor die Semiconductor packages are disclosed. One semiconductor package includes a semiconductor die with an active surface, an opposite inactive surface, and four peripheral side surfaces. A substrate of the semiconductor package is coupled to one side surface of the semic... | 03/07/2006 |
| 6860006 | Method for manufacturing a monolithic ceramic electronic component A monolithic electronic component includes a composite body having a plurality of stacked ceramic layers. The ceramic layers include interconnecting conductors provided in each of the ceramic layers, including first terminals, arranged on a first end surface in the ... | 03/01/2005 |
| 6806552 | Integrated inductive circuits An integrated inductor may be formed over a substrate. An aperture may be formed by a backside etch through the semiconductor substrate underneath the integrated inductor. The aperture may then be filled with a dielectric material. As a result of the removal of the ... | 10/19/2004 |
| 6703714 | Methods for fabricating flip-chip devices and preventing coupling between signal interconnections A method and apparatus for substantially reducing the need for capacitive and inductive compensation for signal lines on a flip-chip semiconductor device. A flip-chip semiconductor device is disclosed having signal lines of substantially equal lengths. At... | 03/09/2004 |
| 6700076 | Multi-layer interconnect module and method of interconnection An electronic module includes an interconnect module having a plurality of metal layers separated by a plurality of dielectric layers in a stacked structure with electronic components mounted on one surface of the module. The electronic components are sel... | 03/02/2004 |
| 6694583 | Embedded multi-layer capacitor in a low-temperature co-fired ceramic (LTCC) substrate An apparatus and method for creating multi-layer embedded ceramic capacitors in low-temperature co-fired ceramic (LTCC) substrates. In order to create multiple layers of electrodes, the individual electrode layers must be connected electrically. According... | 02/24/2004 |
| 6683795 | Shield cap and semiconductor package including shield cap A shield cap and a semiconductor package including a shield cap provide protection for passive components mounted on a substrate of a semiconductor package. The shield cap provides a means for manufacturing a semiconductor package that includes a semicond... | 01/27/2004 |
| 6683512 | High frequency module having a laminate board with a plurality of dielectric layers A high frequency module according to the present invention comprises a laminate board having a plurality of dielectric layers (11 to 18) stacked one on another, a branch filter circuit (DIP10) for separating a plurality of transceiver systems from each ot... | 01/27/2004 |
| 6680123 | Embedding resin An embedding resin embeds an electronic part in an object and has a dielectric constant of about 5 or less and tan δ of about 0.08 or less.... | 01/20/2004 |
| 6680218 | Fabrication method for vertical electronic circuit package and system An electronic circuit package includes a vertical package section (304, FIG. 3) electrically connected to a horizontal package section (306, FIG. 3). The vertical package section includes multiple conductive layers (512, 514, 516, FIG. 5) oriented in para... | 01/20/2004 |
| 6678144 | Capacitor, circuit board with built-in capacitor and method for producing the same A capacitor is formed between a lower wiring layer and an upper wiring layer in an interior of a circuit board. The capacitor is formed of a lower metallic layer which is of at least one valve metal selected from the group consisting of aluminum, tantalum... | 01/13/2004 |
| 6678145 | Wiring connection structure of laminated capacitor and decoupling capacitor, and wiring board An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cav... | 01/13/2004 |
| 6675473 | Method of positioning a conductive element in a laminated electrical device A method of constructing a multilayer electric apparatus, comprising the steps of first providing a set of dielectric layers and forming a set of conductive features and at least one fiducial marking, in mutual reference to each other, on a first one of t... | 01/13/2004 |
| 6674008 | Cross substrate, method of mounting semiconductor element, and semiconductor device A cross substrate and a method of mounting a semiconductor element are provided in which semiconductor elements can be mounted at a high density. Element side electrodes of a circuit forming surface of a semiconductor element and conductive filaments of a... | 01/06/2004 |
| 6670216 | Method for manufacturing a power semiconductor device and direct bonded substrate thereof Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof. In one embodiment, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into ... | 12/30/2003 |
| 6670699 | Semiconductor device packaging structure A semiconductor package comprising an LSI chip, a chip bump, an interposer, and a BGA bump is mounted at a predetermined position of a printed wiring board having a core layer. A heat sink for dissipating heat generated from the LSI chip is installed with... | 12/30/2003 |
| 6668448 | Method of aligning features in a multi-layer electrical connective device A method of constructing an electric apparatus, comprising the following steps. First, a set of dielectric layers is provided. Next, a set of conductive features and at least one fiducial marking are formed on a first one of the dielectric layers, in mutu... | 12/30/2003 |