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| Number | Title | Issue Date |
| 7432601 | Semiconductor package and fabrication process thereof A semiconductor package mainly includes a chip, a substrate, an encapsulant, a plurality of external terminals and a stress release layer. The substrate has an upper surface and a lower surface. The chip is disposed on the upper surface of the substrate by a chip-at... | 10/07/2008 |
| 7429797 | Electronic device and carrier substrate Consistent with an example embodiment, an electronic device comprises a semiconductor device, particularly an integrated circuit, and a carrier substrate with conductive layers on the first side and the second side, and voltage supply and ground connections mutually... | 09/30/2008 |
| 7394152 | Wafer level chip size packaged chip device with an N-shape junction inside and method of fabricating the same The present invention provide a wafer level chip size packaged chip device with a N-shape junction at which external leads electrically connect to peripheral arrayed compatible pads and a method of fabricating the same. In the wafer level chip size package, with suc... | 07/01/2008 |
| 7372130 | Semiconductor device including a semiconductor chip formed on an insulating element such as a tape, and including an improved insulating arrangement A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a... | 05/13/2008 |
| 7368818 | Methods of making microelectronic assemblies including compliant interfaces An assembly includes a structure, a plurality of terminals and a plurality of compliant pads disposed between said terminals and said structure. The terminals are aligned with at least some of said pads, with the pads providing a standoff between the structure and t... | 05/06/2008 |
| 7332799 | Packaged chip having features for improved signal transmission on the package A packaged chip is provided which includes a package element on which a signal-bearing conductive trace has an edge laterally adjacent to an edge of a reference conductive trace (e.g., ground trace) on the same face of a dielectric element, the two traces together f... | 02/19/2008 |
| 7323787 | Off-grid decoupling of ball grid array (BGA) devices and method A multilayered printed wiring board having a ball grid array (BGA) land pattern in which each land in the pattern is connected to a respective via by a link connector, a method of adapting spacing between selected adjacent via and respective link pairs to receive de... | 01/29/2008 |
| 7321165 | Semiconductor device and its manufacturing method In a semiconductor device in which a plurality of substrates each mounting a semiconductor chip are stacked, one ends of the leads formed on the substrates are connected to the semiconductor chip and the other ends thereof are connected to connection terminals of th... | 01/22/2008 |
| 7318962 | Magnetically directed self-assembly of molecular electronic junctions comprising conductively coated ferromagnetic microparticles A device having a substrate, a pair of ferromagnetic leads on a surface of the substrate, laterally separated by a gap, and one or more ferromagnetic microparticles comprising a conductive coating at least partially within the gap. The conductive coating forms at le... | 01/15/2008 |
| 7288832 | Chip-mounted film package A chip-mounted film package includes a base film, an effective film package defined on the base film by a cutting line, a driving chip mounted on the effective film package, a plurality of input pads arranged on an input area of the effective film package and connec... | 10/30/2007 |
| 7279794 | Semiconductor device and electronic device, and methods for manufacturing thereof A semiconductor device is provided including a substrate containing a wire pattern having a plurality of leads and a semiconductor chip mounted on the substrate in a manner that an electrode faces the wire pattern. The electrodes are arranged to be classified into a... | 10/09/2007 |
| 7259452 | Leaded package integrated circuit stacking A system and method for electrically and thermally coupling adjacent IC packages to one another in a stacked configuration is provided. A flex circuit is inserted in part between ICs to be stacked and provides a connective field that provides plural contact areas th... | 08/21/2007 |
| 7256490 | Test carrier for semiconductor components having conductors defined by grooves A test carrier for a semiconductor component includes a base for retaining the component, and an interconnect on the base having contacts configured to electrically engage component contacts on the component. The base includes conductors in electrical communication ... | 08/14/2007 |
| 7253516 | Electronic device and carrier substrate for same Consistent with an example embodiment, an electronic device comprises an integrated circuit and a carrier substrate with a bottom and top conductive layer, and is provided with voltage supply, ground and signal transmission connections. In order to enable the use of... | 08/07/2007 |
| 7253504 | Integrated circuit package and method An integrated circuit package includes a substrate having a central axis dividing the substrate into an upper half and a lower half and an integrated circuit coupled to the substrate. A layer is provided within the substrate in the lower half thereof that is configu... | 08/07/2007 |
| 7247938 | Carrier, method of manufacturing a carrier and an electronic device The carrier (30) comprises a first etch mask (14), a first metal layer (11), an intermediate layer (12), a second metal layer (13) and a second etch mask (17). Both the first and the second etch mask (14, 17) can be p... | 07/24/2007 |
| 7242084 | Apparatuses and associated methods for improved solder joint reliability Apparatuses and associated methods to improve integrated circuit packaging are generally described. More specifically, apparatuses and associated methods to improve solder joint reliability are described. In this regard, according to one example embodiment, one or m... | 07/10/2007 |
| 7180196 | Semiconductor device mounting method, semiconductor device mounting structure, electro-optical device, electro-optical device manufacturing method and electronic device A wiring terminal is formed on a wiring substrate, and an electrode is formed on a semiconductor device. The width of the wiring terminal is smaller than the width of the electrode. When the semiconductor device is mounted on the wiring substrate, the wiring termina... | 02/20/2007 |
| 7157794 | Semiconductor device that suppresses variations in high frequency characteristics of circuit elements A semiconductor device includes a semiconductor substrate having a main surface, the main surface including a first area formed with a high-frequency circuit element and a second area located around the first area and formed with a low-frequency circuit element. The... | 01/02/2007 |
| 7122895 | Stud-cone bump for probe tips used in known good die carriers A method of forming a membrane for use in conjunction with a semiconductor carrier and the membrane which includes an electrically insulating substrate and an interconnect pattern formed on the substrate. A stud is coupled to the interconnect pattern over the substr... | 10/17/2006 |
| 7119423 | Semiconductor device and method of manufacturing the same, electronic module, and electronic instrument A semiconductor chip is mounted on the substrate so that the first group of electrodes faces the first group of leads and the second group of electrodes faces the second group of leads. The first group of leads extends in a direction away from the second group of el... | 10/10/2006 |
| 6927480 | Multi-chip package with electrical interconnection A multi-chip package with electrical interconnection comprises a leadframe, at least a relay conductor, at least a first chip, at least a second chip, a plurality of bonding wires and a molding compound. A dielectric carrier is attached to the leadframe for fixing t... | 08/09/2005 |
| 6700182 | Thermally conductive substrate, thermally conductive substrate manufacturing method and power module By providing an end portion of a radiation plate located on and near an end portion of an insulator sheet, to which a lead frame extends, at a position away from the end portion of the insulator sheet inside of the insulator sheet in a plane direction of ... | 03/02/2004 |
| 6687842 | Off-chip signal routing between multiply-connected on-chip electronic elements via external multiconductor transmission line on a dielectric element A semiconductor chip is provided with a dielectric element having conductive features interconnecting electronic elements within the chip with one another. The conductive features replace internal conductors, and can provide enhanced signal propagation be... | 02/03/2004 |
| 6670634 | Silicon carbide interconnect for semiconductor components An interconnect for semiconductor components includes a substrate, and interconnect contacts on the substrate for electrically engaging component contacts on the components. The interconnect contacts include silicon carbide conductive layers, and conducto... | 12/30/2003 |
| 6664175 | Method of forming ruthenium interconnect for an integrated circuit A multi-layered metal bond pad for a semiconductor die having a conductive metal layer and an overlying ruthenium electrode layer. The ruthenium electrode layer protects the conductive metal from oxidation due to ambient environmental conditions. An inter... | 12/16/2003 |
| 6635514 | Compliant package with conductive elastomeric posts A method of making a semiconductor chip assembly includes the steps of providing a semiconductor chip with contacts and a dielectric substrate wiring layer with terminals, forming a plurality of conductive elastomeric posts such that each post connects on... | 10/21/2003 |
| 6603210 | Semiconductor module and producing method therefor For producing a semiconductor module, an electrically insulating layer and an electrically conductive layer are formed on a Nickel-base metal film over a metallic surface, the electrically conductive layer is connected electrically to an electric element ... | 08/05/2003 |
| 6538208 | Package base for mounting electronic element, electronic device and method of producing the same A package base for mounting an electronic element, an electronic device using the package base, particularly a crystal resonator. The package base comprises an insulative substrate, and an internal electrode formed at a predetermined position on the subst... | 03/25/2003 |
| 6514793 | Stackable flex circuit IC package and method of making same A stackable flex circuit IC package includes a flex circuit comprised of a flexible base with a conductive pattern thereon, and wrapped around at least one end portion of a frame so as to expose the conductive pattern to the edge portion. An IC device is ... | 02/04/2003 |
| 6504096 | Semiconductor device, methods of production of the same, and method of mounting a component A semiconductor device including a package board having interconnection patterns on one main surface, a semiconductor chip electrically connected through internal terminations to the interconnection patterns of the package board and having an element form... | 01/07/2003 |
| 6465878 | Compliant microelectronic assemblies A microelectronic assembly includes a microelectronic element having a first surface including a central region and a peripheral region surrounding the central region, the microelectronic element including a plurality of contacts disposed in the central r... | 10/15/2002 |
| 6461745 | Copper foil for tape carrier and tab carrier tape and tab tape carrier using the copper foil A copper foil for a TAB tape carrier, comprising (a) a copper foil having a shiny surface and a mat surface; and (b) an alloy layer comprising nickel, cobalt and molybdenum, which is formed at least on the shiny surface; a TAB carrier tape, comprising a f... | 10/08/2002 |
| 6457234 | Process for manufacturing self-aligned corrosion stop for copper C4 and wirebond A self-aligned (i.e., spatially selective) process for fabricating a corrosion-resistant conductive pad on a substrate, and an associated structure that includes an interconnect to allow a terminal connection to the conductive pad (e.g., a chip-to-package... | 10/01/2002 |
| 6452271 | Interconnect component for a semiconductor die including a ruthenium layer and a method for its fabrication A multi-layered metal bond pad for a semiconductor die having a conductive metal layer and an overlying ruthenium electrode layer. The ruthenium electrode layer protects the conductive metal from oxidation due to ambient environmental conditions. An inter... | 09/17/2002 |
| 6426549 | Stackable flex circuit IC package and method of making same A stackable flex circuit IC package includes a flex circuit comprised of a flexible base with a conductive pattern thereon, and wrapped around at least one end portion of a frame so as to expose the conductive pattern at the edge portion. An IC device is ... | 07/30/2002 |
| 6426240 | Stackable flex circuit chip package and method of making same A stackable integrated circuit chip package having a flex circuit. The flex circuit itself includes a flexible substrate having opposed, generally planar top and bottom surfaces, and a conductive pattern which is disposed on the bottom surface. The chip p... | 07/30/2002 |
| 6420207 | Semiconductor package and enhanced FBG manufacturing A high density, non-bussed semiconductor package and a full body gold (FBG) method for manufacturing semiconductor packages are provided to improve electrical and mechanical connections with semiconductors and other electronic components and devices. The ... | 07/16/2002 |
| 6417029 | Compliant package with conductive elastomeric posts A method of making a semiconductor chip assembly includes the steps of providing a semiconductor chip with contacts and a dielectric substrate wiring layer with terminals, forming a plurality of conductive elastomeric posts such that each post connects on... | 07/09/2002 |
| 6380634 | Conductor wires and semiconductor device using them The purpose of this invention is to provide a type of conductor wires which are appropriate for making a thin semiconductor device and can minimize problems of short-circuits between wires. This invention pertains to a type of conductor wires for electric... | 04/30/2002 |
