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| Number | Title | Issue Date |
| 7443014 | Electronic module and method of assembling the same An electronic module includes a semiconductor power switch and a semiconductor diode. The lower side of the semiconductor power switch includes an output contact mounted on a die pad of a leadframe, and the upper side of the semiconductor power switch includes a con... | 10/28/2008 |
| 7432588 | Semiconductor device and method of fabricating the same A semiconductor device 100 comprises a leadframe 104 having an island portion 102; two chips of a first semiconductor chip 110 and a second semiconductor chip 120, respectively having top surfaces having, in the peripheral areas th... | 10/07/2008 |
| 7425756 | Semiconductor device and electronic device This invention provides a high frequency power module which is incorporated into a mobile phone and which incorporates high frequency portion analogue signal processing ICs including low noise amplifiers which amplify an extremely weak signal therein. A semiconducto... | 09/16/2008 |
| 7391100 | Integrated circuit package for semiconductor devices having a reduced leadframe pad and an increased bonding area A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die... | 06/24/2008 |
| 7385281 | Semiconductor integrated circuit device A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a ... | 06/10/2008 |
| 7382000 | Semiconductor device A semiconductor device is provided which comprises a connecting lead 4 mounted between a MOS-FET 1 and a regulatory IC 2 on a support plate 3. Connecting lead 4 has a thermally radiative and electrically conductive substrate 6 | 06/03/2008 |
| 7361983 | Semiconductor device and semiconductor assembly module with a gap-controlling lead structure In a semiconductor device (1), semiconductor elements (2) and (3) are mounted on a lead frame (5) having leads (4). The semiconductor elements (2) and (3) are connected with the leads (4) by metallic wires (... | 04/22/2008 |
| 7332806 | Thin, thermally enhanced molded package with leadframe having protruding region A semiconductor die package. It includes (a) a semiconductor die including a first surface and a second surface, (b) a source lead structure including protruding region having a major surface, the source lead structure being coupled to the first surface, (c) a gate ... | 02/19/2008 |
| 7315078 | Chip-stacked semiconductor package and method for fabricating the same A chip-stacked semiconductor package and a method for fabricating the same are proposed. A chip carrier module plate including a plurality of chip carriers, and a heat sink module plate including a plurality of heat sinks are provided, wherein a plurality of through... | 01/01/2008 |
| 7304385 | Semiconductor chip capable of implementing wire bonding over active circuits A reinforced bonding pad structure includes a bondable metal layer defined on a stress-buffering dielectric layer, and an intermediate metal layer damascened in a first inter-metal dielectric (IMD) layer disposed under the stress-buffering dielectric layer. The inte... | 12/04/2007 |
| 7304370 | Electronic device having wiring substrate and lead frame An electronic device includes: a first substrate and a second substrate; a lead frame disposed between the first and the second substrates for electrically connecting therebetween; and a first groove and a second groove disposed on the first and the second substrate... | 12/04/2007 |
| 7262440 | Light emitting diode package and fabrication method thereof The present invention provides a light emitting diode (LED) package and the fabrication method thereof. The LED package includes a lower metal layer, and a first silicon layer, a first insulation layer, a second silicon layer, a second insulation layer, and a packag... | 08/28/2007 |
| 7253506 | Micro lead frame package The present invention comprises a lead frame substrate adapted to receive semiconductor die and multiple passive components. The lead frame substrate is preferably formed from a single piece of electrically conductive material, such as copper, and may be mounted wit... | 08/07/2007 |
| 7242078 | Surface mount multichip devices A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame... | 07/10/2007 |
| 7242085 | Semiconductor device including a semiconductor chip mounted on a metal base A chip size package semiconductor device can have reliable solder mounting and improved mounting reliability. A semiconductor device of one embodiment can include a semiconductor chip (1) mounted to a bottom portion (11) of a metal base (10A). A... | 07/10/2007 |
| 7235871 | Stacked microelectronic dies An assembly of microelectronic devices and method for forming an assembly of microelectronic devices. In one embodiment, the method includes positioning a first packaged microelectronic device adjacent to a support member having support member circuitry, with the fi... | 06/26/2007 |
| 7230320 | Electronic circuit device with reduced breaking and cracking In an electronic circuit device including a substrate including a front surface on which an electronic circuit element is mounted and a reverse surface opposite to the front surface in a thickness direction of the substrate, an electrically conductive terminal membe... | 06/12/2007 |
| 7227251 | Semiconductor device and a memory system including a plurality of IC chips in a common package A semiconductor device is formed by laminating two semiconductor chips with the rear surfaces thereof provided face to face. Each semiconductor chip is provided with an outer lead for clock enable to which the clock enable signal and chip select signal are individua... | 06/05/2007 |
| 7227198 | Half-bridge package A semiconductor package that includes two power semiconductor dies, such as power MOSFET dies, including vertical conduction MOSFETs, arranged in a half-bridge configuration is disclosed. The package may be mounted on a split conductive pad including two isolated di... | 06/05/2007 |
| 7227249 | Three-dimensional stacked semiconductor package with chips on opposite sides of lead A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of t... | 06/05/2007 |
| 7224053 | Semiconductor device responsive to different levels of input and output signals and signal processing system using the same A semiconductor device which integrates a plurality of semiconductor chips into a single package includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip includes a plurality of first bonding pads outputting first signals hav... | 05/29/2007 |
| 7199458 | Stacked offset semiconductor package and method for fabricating In the stacked semiconductor package, on a first semiconductor chip, a second semiconductor chip is stacked offset such that a portion of the first semiconductor chip is exposed. At least one first conductor electrically connects the exposed portion of the first sem... | 04/03/2007 |
| 7199469 | Semiconductor device having stacked semiconductor chips sealed with a resin seal member The cost of a semiconductor device is to be reduced. An electrical connection between a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip is made through an inner lead portion of a lead disposed at a position around the... | 04/03/2007 |
| 7176062 | Lead-frame method and assembly for interconnecting circuits within a circuit module A lead-frame method and assembly for interconnecting circuits within a circuit module allows a circuit module to be fabricated without a circuit board substrate. Integrated circuit dies are attached to a metal lead-frame assembly and the die interconnects are wire-b... | 02/13/2007 |
| 7148578 | Semiconductor multi-chip package A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is ele... | 12/12/2006 |
| 7138707 | Semiconductor package including leads and conductive posts for providing increased functionality A semiconductor package comprising a semiconductor die which has opposed first and second surfaces and at least first and second bond pads disposed on the second surface thereof. In addition to the semiconductor die, the semiconductor package includes at least one l... | 11/21/2006 |
| 7132753 | Stacked die assembly having semiconductor die overhanging support A stack of semiconductor dies is disclosed. A first stack level includes a first semiconductor die and at least one first support that are attached to a substrate surface. A second level includes a second semiconductor die and at least one second support that are at... | 11/07/2006 |
| 7132752 | Semiconductor chip and semiconductor device including lamination of semiconductor chips To prevent short-circuit due to contact of bonding wires each other and to make a semiconductor device compact. A semiconductor chip with a rectangular main surface may comprise: a first side composing the main surface; a second side opposed to the first side; a mai... | 11/07/2006 |
| 7088003 | Structures and methods for integration of ultralow-k dielectrics with improved reliability An improved back end of the line (BEOL) interconnect structure comprising an ultralow k (ULK) dielectric is provided. The structure may be of the single or dual damascene type and comprises a dense thin dielectric layer (TDL) between a metal barrier layer and the UL... | 08/08/2006 |
| 7075174 | Semiconductor packaging techniques for use with non-ceramic packages A method for attaching at least one IC die to a non-ceramic IC package including a leadframe and a base, the IC package being configured for receiving the at least one IC die, includes attaching the IC die to an upper surface of a thermal carrier in a manner which f... | 07/11/2006 |
| 6703261 | Semiconductor device and manufacturing the same A semiconductor device is disclosed in which a heat sink is difficult to warp and which is inexpensive. The semiconductor device comprises a heat sink, a pair of screwing pieces having respective inner end portions connected to both ends of the heat sink ... | 03/09/2004 |
| 6700793 | Semiconductor device Disclosed is a technique capable of improving a power supply efficiency in a power supply circuit. A power MOSFET in a high side of a combined power MOSFET constituting a DC-DC converter is constituted of a horizontal MOSFET, and a power MOSFET in a low s... | 03/02/2004 |
| 6700206 | Stacked semiconductor package and method producing same A semiconductor device package and method of fabricating same. The package includes a lead frame having a die paddle and a plurality of lead fingers. The active surface of a first semiconductor die is adhered to the underside of the die paddle and is elec... | 03/02/2004 |
| 6690089 | Semiconductor device having multi-chip package A semiconductor device includes a first semiconductor element provided with bonding electrodes at a predetermined pitch and lead frames provided on the first semiconductor element which work as electrical inputs/outputs. The semiconductor device further i... | 02/10/2004 |
| 6683370 | Semiconductor component and method of manufacturing same A semiconductor component includes a non-leaded leadframe (100, 200, 300) having at least one interior electrical contact (110) and a plurality of exterior electrical contacts (120), a semiconductor chip (410) mounted onto the leadframe, a mold compound (... | 01/27/2004 |
| 6680531 | Multi-chip semiconductor package A multi-chip semiconductor package is proposed, in which a lead frame is formed with a chip carrier that consists of at least one supporting frame and a plurality of downwardly extending portions integrally formed with the supporting frame. As the chip ca... | 01/20/2004 |
| 6677672 | Structure and method of forming a multiple leadframe semiconductor device A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coup... | 01/13/2004 |
| 6677665 | Dual-die integrated circuit package A dual-die integrated circuit package is provided, which can be used to pack two semiconductor dies in the same package unit. These two semiconductor dies are of the type having an array of bonding pads formed thereon. The dual-die integrated circuit pack... | 01/13/2004 |
| 6677674 | Semiconductor package having two chips internally connected together with bump electrodes and both chips externally connected to a lead frame with bond wires A semiconductor device includes a lead frame having a die pad and leads, a first semiconductor chip having first internal electrodes and first external electrodes and mounted on the die pad, a second semiconductor chip having second internal electrodes an... | 01/13/2004 |
| 6677181 | Method for fabricating stacked chip package device The stack package includes at least two semiconductor chips disposed up and down. Bonding pads are formed in the respective semiconductor chips along a center line. Inner leads of a first lead frame and a second lead frame are attached to bonding-pad-disp... | 01/13/2004 |
