Bizarre Patents
Crispy Chip Sandwich and Process of Producing a Sandwich Product
A food product comprising a multilayer cookie or snack having outer layers formed from a crispy type edible food product such as a potato chip or corn chip, etc. with an intermediate marshmallow layer being in contact with the inner surface of each crispy chip and one or more filler substances.
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| Number | Title | Issue Date |
| 7443013 | Flexible substrate for package of die The present invention provides a flexible substrate for a package of a die which has an active surface and a plurality of first bond pads arranged in a form of a row and formed on the active surface. The flexible substrate includes a flexible insulating film and a p... | 10/28/2008 |
| 7368807 | Low cost method to produce high volume lead frames A method (300) for fabricating a lead frame (100), comprising forming a plurality of external leads (122) in a lead frame material (108), plating a metal (222) on all surfaces of the lead frame material (108), and subsequent... | 05/06/2008 |
| 7339261 | Semiconductor device A semiconductor device which permits reduction in the number of pins and in size thereof is provided. The semiconductor device comprises a sealing body formed of an insulating resin, the sealing body having an upper surface, a lower surface opposite to the upper sur... | 03/04/2008 |
| 7288832 | Chip-mounted film package A chip-mounted film package includes a base film, an effective film package defined on the base film by a cutting line, a driving chip mounted on the effective film package, a plurality of input pads arranged on an input area of the effective film package and connec... | 10/30/2007 |
| 7288833 | Stress-free lead frame The present invention relates to a stress-free lead frame (1) for a semiconductor. The stress-free lead frame (1) is provided with a stress-relief means (15) and an interlocking means (16) at the outer periphery. The stress-relief means (... | 10/30/2007 |
| 7196428 | Bond pad structure for integrated circuit chip An integrated circuit chip is provided, which includes a bond pad structure. The bond pad structure includes a bond pad, a first metal plate, and a second metal plate. The first metal plate is located under the bond pad. The first metal plate has a first outer profi... | 03/27/2007 |
| 7192809 | Low cost method to produce high volume lead frames A method (300) for fabricating a lead frame (100), comprising forming a plurality of external leads (122) in a lead frame material (108), plating a metal (222) on all surfaces of the lead frame material (108), and subsequent... | 03/20/2007 |
| 7067908 | Semiconductor package having improved adhesiveness and ground bonding A semiconductor package having improved adhesiveness between the chip paddle and the package body and having improved ground-bonding of the chip paddle. A plurality of through-holes are formed in the chip paddle for increasing the bonding strength of encapsulation m... | 06/27/2006 |
| 6666997 | Method for removing cleaning compound flash from mold vents An integrated circuit leadframe is specially adapted to adhere to injection mold cleaning compounds in the area of vents for an injection mold. An area of a leadframe rail that is normally positioned adjacent a mold vent is provided with apertures, surfac... | 12/23/2003 |
| 6576491 | Methods for producing high reliability lead frame and packaging semiconductor die using such lead frame A lead frame includes a first side rail, a second side rail spaced apart from the first side rail, a center rail disposed between the first side rail and the second side rail, and a plurality of package locations. Each package location includes a first an... | 06/10/2003 |
| 6566740 | Lead frame for a semiconductor device and method of manufacturing a semiconductor device A lead frame for a semiconductor device. The lead frame has a layer defining a first unit lead frame including a first support for a semiconductor chip and a plurality of leads spaced around the first support. The first support has a peripheral edge. The ... | 05/20/2003 |
| 6404216 | Test contact A semiconductor leadframe with an improved test contact is disclosed. Leadframes that are coated with a harder thinner material such as Nickel/Palladium and subsequently plated with a softer and thicker metal test contact, such as gold or silver, is discl... | 06/11/2002 |
| 6331728 | High reliability lead frame and packaging technology containing the same A lead frame includes a first side rail, a second side rail spaced apart from the first side rail, a center rail disposed between the first side rail and the second side rail, and a plurality of package locations. Each package location includes a first an... | 12/18/2001 |
| 6313526 | Semiconductor apparatus, Including thin film belt-like insulating tape A semiconductor apparatus includes a thin film belt-like insulating tape having a plurality of predetermined wire patterns thereon, and a plurality of IC chips that are provided on a surface of the insulating tape at uniform spaces in a lengthwise directi... | 11/06/2001 |
| 5793100 | Lead frame for semiconductor device A lead frame includes first slits in a lead frame edge in a direction parallel to a longitudinal direction of the lead frame edge at spaced intervals and a plurality of slits in the lead frame edge in a direction parallel to the first slits at spaced inte... | 08/11/1998 |
| 5223738 | Leadframe The present invention relates to a leadframe having slits around a semiconductor device forming area to absorb distortion or warpage of the leadframe because of the difference in the coefficients of thermal expansion of the leadframe and a sealing resin. ... | 06/29/1993 |
| 5025114 | Multi-layer lead frames for integrated circuit packages A composite leadframe is provided. The leadframe comprises a rigid metal portion electrically interconnected to a flexible multi-layer portion. When sealed within an electronic package, the composite leadframe provides a higher lead density than achieved ... | 06/18/1991 |
| 4951119 | Lead frame for semiconductor devices A lead frame for semiconductor devices comprises a plurality of lead sets, each made of a metal strip of a plurality of leads arranged side by side with a small clearance therebetween and a connecting member for integrally connecting the leads. A pluralit... | 08/21/1990 |
| 4859632 | Method for manufacturing the same A lead frame and method for processing the lead frames from a continuous strip of lead frames. A first insulation support member and a second insulative support member are first molded to the lead frame. After the support members are formed, the positioni... | 08/22/1989 |
| 4801561 | Method for making a pre-testable semiconductor die package An encapsulated die package (20) is shown in which a semiconductor die is connected in a die-attach aperture of a copper foil tape (11). Die contact pads (31) are bonded to the inner ends (31a) of interconnected finger contacts (13) on the tape. Finger co... | 01/31/1989 |
| 4778564 | Process for producing an assembly tape for bonding metal fingers to electronic devices In an assembly tape to be used in the tape automated bonding of semiconductor devices a single layer or two or three layer tape is described. The arrays of finger patterns created in the tape are isolated by forming transverse slots across the tape. These... | 10/18/1988 |
| 4736236 | Tape bonding material and structure for electronic circuit fabrication An electronic circuit assembly is disclosed including a semiconductor die having an aluminum therminal pad on its top surface. A lead frame is disposed adjacent the semiconductor die and is adapted to be electrically connected to the die. An electrical co... | 04/05/1988 |
| 4733014 | Lead frame A lead frame for applying micro-electronic elements thereon, which lead frame comprises a series of lead patterns disposed at mutually equal pitch distances, each consisting of a carrier plate lying on the axis of the frame for applying a micro-electronic... | 03/22/1988 |
| 4721992 | Hinge tape In an assembly tape to be used in the tape automated bonding of semiconductor devices a single layer or two or three layer tape is described. The arrays of finger patterns created in the tape are isolated by forming transverse slots across the tape. These... | 01/26/1988 |
| 4701781 | Pre-testable semiconductor die package An encapsulated die package (20) is shown in which a semiconductor die is connected in a die-attach aperture of a copper foil tape (11). Die contact pads (31) are bonded to the inner ends (31a) of interconnected finger contacts (13) on the tape. Finger co... | 10/20/1987 |
| 4663650 | Packaged integrated circuit chip An IC chip package comprises a lead frame support on which lead frame segments are disposed. An IC chip is disposed on a pad area on the lead frame support. There is a cover on the support. A sealant material encircles the IC chip within the confines of t... | 05/05/1987 |
| 4283839 | Method of bonding semiconductor devices to carrier tapes A carrier tape (20) is provided for assembling components to make semiconductor devices. The tape (20) is made from soft, copper foil (21) and eliminates a plastic substrate (12) of the prior art. Patterns (27) containing clusters (24) of inner leads (28)... | 08/18/1981 |
| 4234666 | Carrier tapes for semiconductor devices A carrier tape (20) is provided for assembling components to make semiconductor devices. The tape (20) is made from soft, copper foil (21). Patterns (27) containing clusters (24) of inner leads (28) and (30) are accurately formed into tape (20) for bondin... | 11/18/1980 |
| 4054238 | Method, apparatus and lead frame for assembling leads with terminals on a substrate Each lead frame in a continuous strip of lead frames is formed with opposed pairs of integral and subsequently removable aligning tabs for locating a substrate on the lead frame such that leads of the lead frame and respective terminals on the substrate a... | 10/18/1977 |
| 3961413 | Method and apparatus for the assembly of semiconductor devices A dual-in-line plastic package for an integrated circuit is assembled with the use of a thermal stress-resistant thin-film interconnect pattern on a flexible insulator film. All electrical connections to the semiconductor chip are made simultaneously by b... | 06/08/1976 |
