Celebrity Inventors
Comic actor Danny Kaye received patent D166,807 for the co-design of "Blowout Toy or the Like". It's similar to one of those toys that unravels when you blow into at a birthday party except Kaye's has three blowouts going in different directions, not just one.
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| Number | Title | Issue Date |
| 7239019 | Selectively converted inter-layer dielectric An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from ... | 07/03/2007 |
| 7218008 | Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument A semiconductor device includes: a semiconductor substrate in which an integrated circuit is formed; an interconnect layer which includes a linear section and a land section connected with the linear section; and an underlayer disposed under the interconnect layer, ... | 05/15/2007 |
| 7211900 | Thin semiconductor package including stacked dies A semiconductor package and method for fabricating the same is disclosed. In one embodiment, the semiconductor package includes a circuit board, at least two semiconductor chips, electric connection means, an encapsulant, and a plurality of conductive balls. The cir... | 05/01/2007 |
| 5834849 | High density integrated circuit pad structures An integrated circuit with high density pad structures is provided. The circuit has circuitry covered by an insulating layer. Pads are formed on the insulating layer overlapping the circuitry. A pattern of holes in the insulating layer allows electrical c... | 11/10/1998 |
| 5786625 | Moisture resistant semiconductor device A MOS type transistor with a gate is formed on the surface of a semiconductor substrate, and thereafter an interlayer insulating film and a first level wiring layer on the insulating film are formed. The wiring layer is patterned to cover the gate electro... | 07/28/1998 |
| 5643805 | Process for producing a bipolar device A bipolar device having a level difference between the contact area level of a base electrode and a base region in a silicon substrate, and the contact area level of an emitter electrode and an emitter region in the silicon substrate in the range of 0.03 ... | 07/01/1997 |
| 5619069 | Bipolar device and production thereof A bipolar device having a level difference between the contact area level of a base electrode and a base region in a silicon substrate, and the contact area level of an emitter electrode and an emitter region in the silicon substrate in the range of 0.03 ... | 04/08/1997 |
| 4839715 | Chip contacts without oxide discontinuities An integrated circuit chip including a first and a higher second surface levels with an abrupt sidewall step transition therebetween, and having a first layer of a first conductive material disposed over the first surface level and over the second surface... | 06/13/1989 |
| 4809055 | Semiconductor device having an electrode and a method of manufacturing the same An SiO2 insulating layer is formed on an Si substrate, and an Si3 N4 insulating layer is formed on the SiO2 layer. A notch is formed in the Si3 N4 layer using a resist film as a mask. The S... | 02/28/1989 |
| 4337115 | Method of forming electrodes on the surface of a semiconductor substrate There is provided a method of forming an electrode on the surface of a semiconductor substrate which comprises the steps of (A) depositing on the surface of a semiconductor substrate an insulation layer provided with at least one opening for contact between th... | 06/29/1982 |
| 4272561 | Hybrid process for SBD metallurgies A method for forming thin film patterns in the fabrication of integrated circuits utilizing a lift-off mask in an inverse vertical relationship with the desired metal film. The method involves the preliminary blanket deposition of the metal in-point, foll... | 06/09/1981 |
| 4035206 | Method of manufacturing a semiconductor device having a pattern of conductors A method of manufacturing a semiconductor device having a pattern of conductors, according to which method an auxiliary layer is formed which consists of two different sub-layers in which the negative of the desired pattern is provided and which is covere... | 07/12/1977 |
