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| Number | Title | Issue Date |
| 6686606 | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof The Mo or MoW composition layer has a low resistivity of less than 15 μΩcm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along w... | 02/03/2004 |
| 6664640 | Semiconductor device A semiconductor apparatus comprising: a semiconductor substrate; a first surface of the semiconductor substrate on which a semiconductor device is formed; a second surface opposite to the first surface of the semiconductor substrate; a via hole penetratin... | 12/16/2003 |
| 6661026 | Thin film transistor substrate A TFT substrate includes a gate electrode and gate pad on a transparent substrate, an insulating layer on the gate electrode and exposing a portion of the gate pad, a semiconductor film on the insulating layer and the gate electrode, an impurity doped sem... | 12/09/2003 |
| 6614641 | Ceramic electronic component A ceramic electronic component includes a ceramic body; terminal electrodes formed on the ceramic body; and lead terminals joined to the terminal electrodes with solder containing Sn. Each terminal electrode includes a first electrode layer formed on the ... | 09/02/2003 |
| 6605842 | Semiconductor device and a method of manufacturing the same In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (... | 08/12/2003 |
| 6582982 | Composition for wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof The Mo or MoW composition layer has a low resistivity of less than 15 μΩcm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along w... | 06/24/2003 |
| 6570182 | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof The Mo or MoW composition layer has a low resistivity of less than 15 μΩcm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along w... | 05/27/2003 |
| 6528848 | Semiconductor device and a method of manufacturing the same In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (... | 03/04/2003 |
| 6486494 | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof The Mo or MoW composition layer has a low resistivity of less than 15 μΩcm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along w... | 11/26/2002 |
| 6445004 | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof The Mo or MoW composition layer has a low resistivity of less than 15 μΩcm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along w... | 09/03/2002 |
| 6380098 | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof The Mo or MoW composition layer has the low resistivity less than 15 μΩcm and is etched to have a smooth taper angle using an Al alloy etchant or a Cr etchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor device along wit... | 04/30/2002 |
| 6376910 | Solder-on back metal for semiconductor die A solderable back contact for semiconductor die consists of a titanium layer bonded to the bottom of the die. The free surface of the titanium layer is coated with a copper layer. A soft solder layer joins the bottom of the die to a copper lead frame by f... | 04/23/2002 |
| 6339230 | Method for manufacturing a liquid crystal display A method for manufacturing a liquid crystal display is provided. The method includes the steps of forming a gate electrode and a gate pad by sequentially depositing a first metal film and a second metal film on a substrate of a TFT area and a pad area, re... | 01/15/2002 |
| 6337520 | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and manufacturing method thereof The Mo or MoW composition layer has the low resistivity less than 15 μΩcm and is etched to have a smooth taper angle using an Al alloy etchant or a Cr etchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor device along wit... | 01/08/2002 |
| 6334567 | Component and method for production thereof The invention relates to a component and to a method for the production. The component is an electronic component with a micro electronic chip and a carrier which is produced by means of isothermal coagulation.... | 01/01/2002 |
| 6331443 | Method for manufacturing a liquid crystal display A method for manufacturing a liquid crystal display is provided. The method includes the steps of forming a gate electrode and a gate pad by sequentially depositing a first metal film and a second metal film on a substrate of a TFT area and a pad area, re... | 12/18/2001 |
| 6309965 | Method of producing a semiconductor body with metallization on the back side that includes a titanium nitride layer to reduce warping To markedly reduce wafer warping of semiconductor wafers without weakening the strength of adhesion to substrate materials, a novel back side metallizing system is presented. On a silicon semiconductor body an aluminum layer and a diffusion barrier layer ... | 10/30/2001 |
| 6268661 | Semiconductor device and method of its fabrication A connection between a contact plug and an interconnect in a semiconductor device is disclosed. A contact plug is formed in a hole within an insulating film with its upper and generally in flush with a surface of the interlayer insulating film. An Interco... | 07/31/2001 |
| 6211550 | Backmetal drain terminal with low stress and thermal resistance A semiconductor device includes a source region and a gate disposed at the upper surface of a silicon substrate, which includes a drain region for the device. On the lower surface of the substrate is disposed a backmetal drain terminal comprising a stack ... | 04/03/2001 |
| 6147403 | Semiconductor body with metallizing on the back side To markedly reduce wafer warping of semiconductor wafers without weakening the strength of adhesion to substrate materials, a novel back side metallizing system is presented. On a silicon semiconductor body an aluminum layer and a diffusion barrier layer ... | 11/14/2000 |
| 6140702 | Plastic encapsulation for integrated circuits having plated copper top surface level interconnect A plastic packaged integrated circuit (20) having a thick copper plated top surface level interconnection structure. A semiconductor integrated circuit (20) is formed having devices at the surface of a semiconductor substrate (23). First and second metall... | 10/31/2000 |
| 6140150 | Plastic encapsulation for integrated circuits having plated copper top surface level interconnect A plastic packaged integrated circuit (20) having a thick copper plated top surface level interconnection structure. A semiconductor integrated circuit (20) is formed having devices at the surface of a semiconductor substrate (23). First and second metall... | 10/31/2000 |
| 6140703 | Semiconductor metallization structure A high temperature metallization system for use with a semiconductor device (23). The semiconductor device (23) has a multi-layer metallization system (36). An adhesion layer (37) of the metallization system (36) is formed on a semiconductor substrate (20... | 10/31/2000 |
| 6104062 | Semiconductor device having reduced effective substrate resistivity and associated methods A semiconductor device includes at least one device active region formed in a first surface of a semiconductor substrate, an electrical contact layer on a second surface of the semiconductor substrate, and at least one resistivity-lowering body positioned... | 08/15/2000 |
| 6081308 | Method for manufacturing liquid crystal display Since Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single Mo or MoW layer can be used as a wiring by itself of large scale and high resolution liquid crystal. The Mo or MoW layer has th... | 06/27/2000 |
| 6027957 | Controlled solder interdiffusion for high power semiconductor laser diode die bonding A method and a resulting device for mounting a semiconductor to a submount by depositing a first layer of a first metal solder having a selected first melting point and corresponding thickness onto a surface of the semiconductor. Depositing a second layer... | 02/22/2000 |
| 5965946 | Package having Au layer semiconductor device having Au layer A method of mounting a semiconductor device first forms a barrier layer on one surface of an semiconductor substrate made of Si. Then, a first Au layer is formed on the barrier layer. Accordingly, a semiconductor device is provided. The barrier layer is f... | 10/12/1999 |
| 5901901 | Semiconductor assembly with solder material layer and method for soldering the semiconductor assemly In a semiconductor assembly with a solder material layer and a method for soldering the semiconductor assembly, a silicon semiconductor body with a diffusion barrier layer is provided with a solder material layer, preferably a tin layer. The semiconductor... | 05/11/1999 |
| 5726494 | Semiconductor device having a plated heat sink A semiconductor device having a plated heat sink structure is provided, in which an Au layer (5) high in thermal expansion coefficient is formed on the lower surface of a GaAs substrate (1) having a source electrode (2), a gate electrode (3) and a drain e... | 03/10/1998 |
| 5698897 | Semiconductor device having a plated heat sink A semiconductor device having a plated heat sink structure is provided, in which an Au layer (5) high in thermal expansion coefficient is formed on the lower surface of a GaAs substrate (1) having a source electrode (2), a gate electrode (3) and a drain e... | 12/16/1997 |
| 5641994 | Multilayered A1-alloy structure for metal conductors A Si IC includes an Al-based layer which is deposited as a composite of sublayers of different composition Al-based materials. In one embodiment a first sublayer comprises an Al-Si-based alloy disposed so as to prevent substantial Si migration into the fi... | 06/24/1997 |
| 5635764 | Surface treated structure for solder joint On a rear surface of a semiconductor (10), a contact layer (11), a diffusion preventing layer (12) and a solder joint layer (13) are formed, and this solder joint layer (13) is connected to a mount base (15) by a Pb-Sn solder layer (14). The contact layer... | 06/03/1997 |
| 5614291 | Semiconductor device and method of manufacturing the same A semiconductor device, including a nickel layer formed on a semiconductor substrate and a solder layer formed on the nickel layer, and a method of manufacturing such a device are disclosed. The percent ratio of an X-ray diffraction peak intensity of the ... | 03/25/1997 |
| 5561083 | Method of making multilayered Al-alloy structure for metal conductors A Si IC includes an Al-based layer which is deposited as a composite of sublayers of different composition Al-based materials. In one embodiment a first sublayer comprises an Al-Si-based alloy disposed so as to prevent substantial Si migration into the fi... | 10/01/1996 |
| 5451544 | Method of manufacturing a back contact for semiconductor die The back contact of a silicon die consists of a pure aluminum contact, alloyed into the back surface of the silicon. The back surface need not be subjected to a grinding operation. The aluminum is deposited by an E-beam deposition process. The aluminum is... | 09/19/1995 |
| 5436505 | Heat-resisting ohmic contact on semiconductor diamond layer Disclosed is a heat-resistant ohmic contact formed on a semiconducting diamond. It has a contact Ti layer having a thickness of 10 to 70 Å and a carbide layer generated by the reaction between the Ti layer and the semiconducting diamond layer. A diffusio... | 07/25/1995 |
| 5306950 | Electrode assembly for a semiconductor device An electrode assembly for a semiconductor device includes a contact layer formed on a semiconductor substrate and consisting mainly of a rare-earth metal or metals, or a silicide thereof, or a mixture thereof, and a diffusion barrier layer formed on the c... | 04/26/1994 |
| 5304847 | Direct thermocompression bonding for thin electronic power chips Annealed copper foil (12) is coated with chromium film (16), followed by coating with an appropriate thickness of gold film (14) and is thermocompression bonded to an aluminum metallized substrate (18) on a silicon chip (30) to provide solderable, high cu... | 04/19/1994 |
| 5231306 | Titanium/aluminum/nitrogen material for semiconductor devices A barrier material for use in preventing interdiffusion of silicon and aluminum at silicon/aluminum interfaces comprises a layer of titanium, aluminum, and nitrogen between about 100Å and 1000Å thick. The barrier material comprises between 1% and 20% al... | 07/27/1993 |
| 5206186 | Method for forming semiconductor electrical contacts using metal foil and thermocompression bonding Annealed copper foil (12) is coated with chromium film (16), followed by coating with an appropriate thickness of gold film (14) and is thermocompression bonded to an aluminum metallized substrate (18) on a silicon chip (30) to provide solderable, high cu... | 04/27/1993 |
