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Class 257/E21.665 - Magnetic nonvolatile memory structures, e.g., MRAM (EPO)


Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.662. This subclass
No. of patents: 102
Last issue date: 08/12/2008


1      
NumberTitleIssue Date
7411263Magnetic memory device
A magnetic memory device includes a magnetoresistive element and a first wiring layer. The magnetoresistive element includes a fixed layer, a recording layer, and a non-magnetic layer interposed therebetween. The first wiring layer extends in a first direction and g...
08/12/2008
7405087Magnetic memory device and method of manufacturing the same
A magnetic memory device includes a first interconnection which runs in a first direction, a second interconnection which runs in a second direction different from the first direction, a magnetoresistive element which is arranged at the intersection of and between t...
07/29/2008
7402879Layered magnetic structures having improved surface planarity for bit material deposition
The present invention provides a method of fabricating a portion of a memory cell, the method comprising providing a first conductor in a trench which is provided in an insulating layer and flattening an upper surface of the insulating layer and the first conductor,...
07/22/2008
7399646Magnetic devices and techniques for formation thereof
Techniques for forming a magnetic device are provided. In one aspect, a method of forming a via hole self-aligned with a magnetic device comprises the following steps. A dielectric layer is formed over at least a portion of the magnetic device. The dielectric layer ...
07/15/2008
7396750Method and structure for contacting two adjacent GMR memory bit
A method and a structure are provided for improving the contact of two adjacent GMR memory bits. Two adjacent bit ends are connected by utilizing a single via. ...
07/08/2008
7397111Semiconductor wafer, an electronic component, and a component carrier for producing the electronic component
An electronic component includes a semiconductor chip with a chip topside, an integrated circuit, and a chip backside. The chip backside includes a magnetic layer. The electronic component further includes a chip carrier with a magnetic layer on its carrier topside....
07/08/2008
7394123Magnetic random access memory array with thin conduction electrical read and write lines
An MTJ MRAM cell is formed between ultra-thin orthogonal word and bit lines of high conductivity material whose thickness is less than 100 nm. Lines of this thickness produce switching magnetic fields at the cell free layer that are enhanced by a factor of approxima...
07/01/2008
7381616Method of making three dimensional, 2R memory having a 4F2 cell size RRAM
A method of fabricating a multi-level 3D memory array includes: preparing a wafer and peripheral circuits thereon; layers of metal, memory resistor material, and metal are deposited, patterned and etched. The steps of the method of the invention are repeated for N l...
06/03/2008
7383376Apparatus and methods for storing data in a magnetic random access memory (MRAM)
An apparatus and methods store data in a magnetic random access memory (MRAM) in a fast and efficient manner. Embodiments advantageously decrease the number of clock cycles required to store data by eliminating at least one wait state in a transition from a read sta...
06/03/2008
7378698Magnetic tunnel junction and memory device including the same
A magnetic tunnel junction device includes a magnetically programmable free magnetic layer. The free magnetic layer includes a lamination of at least two ferromagnetic layers and at least one intermediate layer interposed between the at least two ferromagnetic layer...
05/27/2008
7375388Device having improved surface planarity prior to MRAM bit material deposition
The present invention provides a method of fabricating a portion of a memory cell, the method comprising providing a first conductor in a trench which is provided in an insulating layer and flattening an upper surface of the insulating layer and the first conductor,...
05/20/2008
7372090Magnetic random access memory device and method of forming the same
Example embodiments of the present invention disclose a semiconductor memory device and a method of forming a memory device. A semiconductor memory device may include a digit line disposed on a substrate, an intermediate insulating layer covering the digit line, a m...
05/13/2008
7372116Heat assisted switching in an MRAM cell utilizing the antiferromagnetic to ferromagnetic transition in FeRh
A magnetic memory cell for use in a magnetic random access memory array that uses the antiferromagnetic to ferromagnetic transition properties of FeRh to assist in the control of switching of the memory cell. ...
05/13/2008
7372118Magnetic random access memory and method of manufacturing the same
A magnetic random access memory includes, a lower electrode, a magnetoresistive element which is arranged above the lower electrode and has side surfaces, and a protective film which covers the side surfaces of the magnetoresistive element, has a same planar shape a...
05/13/2008
7368299MTJ patterning using free layer wet etching and lift off techniques
Methods of patterning magnetic tunnel junctions (MTJ's) of magnetic memory devices, wherein the second magnetic layer or free layer of a magnetic stack may be patterned using a wet etch technique. A cap layer is formed over the free layer after the free layer is pat...
05/06/2008
7358100Bottom conductor for integrated MRAM
A method to fabricate an MTJ device and its connections to a CMOS integrated circuit is described. The device is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is sele...
04/15/2008
7351594Methods of forming magnetic random access memory devices having titanium-rich lower electrodes with oxide layer and oriented tunneling barrier
Magnetic Random Access Memory (MRAM) devices include a lower electrode and a magnetic tunnel junction on the lower electrode. The magnetic tunnel junction includes a seed layer and a tunneling barrier that is oriented in a same direction as the most closely packed p...
04/01/2008
7345367Magnetic memory device and producing method thereof
A magnetic memory device exhibits improved writing characteristics by providing a magnetic flux concentrator which efficiently applies the magnetic field, which is generated by the writing word line, to the memory layer of the TMR element. The magnetic memory device...
03/18/2008
7341875Semiconductor memory device with a capacitor formed therein and a method for forming the same
To integrate a capacitor device (40) into the region of a semiconductor memory device with a particularly small number of process steps, a lower electrode device (43) and an upper electrode device (44) of the capacitor device (40) are pro...
03/11/2008
7323349Self-aligned cross point resistor memory array
A method of fabricating resistor memory array includes preparing a silicon substrate; depositing a bottom electrode, a sacrificial layer, and a hard mask layer on a substrate P+ layer; masking, patterning and etching to remove, in a first direction, a portion of the...
01/29/2008
7319262MRAM over sloped pillar
An apparatus including a pillar located over a substrate and having at least one sloped surface oriented at an acute angle relative to the substrate. The apparatus also includes an MRAM stack substantially conforming to the sloped surface, the MRAM stack thereby als...
01/15/2008
7316933Method for producing an annular microstructure element
An annular microstructure element, in particular an annularly arranged monolayer or multilayer thin film, is formed over a substrate (S), e.g., for use in a magnetoresistive memory. To that end, a masking layer is applied over the substrate. An opening (C) is etched...
01/08/2008
7315071Magnetic RAM
A memory element for a magnetic RAM, contained in a recess of an insulating layer, the recess including a portion with slanted sides extending down to the bottom of the recess, the memory element including a first magnetic layer portion substantially conformally cov...
01/01/2008
7315053Magnetoresistive effect element and magnetic memory device
Write characteristics and read characteristics can be improved at the same time by applying novel materials to ferromagnetic layers. In a magnetoresistive effect element having a pair of ferromagnetic layers being opposed to each other through an intermediate layer ...
01/01/2008
7309903Tunneling magnetoresistance device semiconductor junction device magnetic memory and semiconductor light-emitting device
A pin junction element (10) includes a ferromagnetic p-type semiconductor layer (11) and a n-type semiconductor layer (12) which are connected via an insulating layer (13), and which shows a tunneling magnetic resistance according to the ...
12/18/2007
7306954Process flow for building MRAM structures
MRAM structures employ the magnetic properties of layered magnetic and non-magnetic materials to read memory storage logic states. Improvements in switching reliability may be achieved by altering the shape of the layered magnetic stack structure. Forming recessed r...
12/11/2007
7276753Dynamic random access memory cell and fabricating method thereof
A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor is formed inside the deep tren...
10/02/2007
7271010Nonvolatile magnetic memory device and manufacturing method thereof
An TMR-type MRAM comprising a transistor for selection; a first connecting hole; a first wiring (write-in word line); a second insulating interlayer covering a first insulating interlayer and the first wiring; a TRM device formed on the second insulating interlayer;...
09/18/2007
7267999MRAM layer having domain wall traps
A common pinned layer is shared by multiple memory cells in an MRAM device. The common pinned layer includes a plurality of domain wall traps that prevent the formation of domain walls within a region of the common pinned layer corresponding to a given memory cell. ...
09/11/2007
7267997Process for forming magnetic memory structures
An exemplary method for making a memory structure comprises forming a first ferromagnetic layer, forming a spacer layer above the first ferromagnetic layer, forming a second ferromagnetic layer above the spacer layer by applying a first deposition process to form a ...
09/11/2007
7265404Bottom conductor for integrated MRAM
A structure that is well suited to connecting an MTJ device to a CMOS integrated circuit is described. It is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is selected...
09/04/2007
7262064Magnetoresistive effect element, magnetic memory element magnetic memory device and manufacturing methods thereof
In a magnetoresistive effect element using a ferromagnetic tunnel junction having a tunnel barrier layer sandwiched between at least a pair of ferromagnetic layers, a magnetization free layer comprising one of the ferromagnetic layers is composed of a single layer o...
08/28/2007
7259040Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby
A process for manufacturing a phase change memory array, includes the steps of: forming a plurality of PCM cells, arranged in rows and columns; and forming a plurality of resistive bit lines for connecting PCM cells arranged on a same column, each resistive bit line...
08/21/2007
7259024Method of treating a substrate in manufacturing a magnetoresistive memory cell
A method of treating a substrate in manufacturing a magnetoresistive memory cell includes performing a cleaning operation on the substrate using a mask layer as a protection layer for etching of a peripheral via. Further, an etch stop layer can used as a protection ...
08/21/2007
7253009Method of producing an integrated circuit arrangement with field-shaping electrical conductor
An integrated circuit arrangement includes at least one electrical conductor that, when a current flows through it, produces a magnetic field that acts on at least a further part of the circuit arrangement, wherein seen in cross section, the electrical conductor has...
08/07/2007
7248045Magnetic sensing device, method of forming the same, magnetic sensor, and ammeter
The present invention provides a magnetic sensing device capable of stably sensing a signal magnetic field with high sensitivity by suppressing occurrence of a hysteresis to reduce 1/f noise. A magnetic sensing device has a stacked body including a pinned layer havi...
07/24/2007
7247506Method for producing magnetic memory device
There is provided a magnetic memory device which has a small switching current for a writing line and which has a small variation therein. A method for producing such a magnetic memory device includes: forming a magnetoresistive effect element; forming a first insul...
07/24/2007
7244981Scalable high performance non-volatile memory cells using multi-mechanism carrier transport
A plurality of select gates are formed over a substrate. In one embodiment, the select gates are formed vertically on the sidewalls of trenches. The substrate includes a plurality of diffusion regions that are each formed between a pair of planar select gates. In a ...
07/17/2007
7242047Magnetic memory adopting synthetic antiferromagnet as free magnetic layer
A magnetic memory is composed of: a magnetoresistance element including a free magnetic layer; a first interconnection extending in a first direction obliquely to an easy axis of the free magnetic layer; a second interconnection extending in a second direction subst...
07/10/2007
7238541Method of incorporating magnetic materials in a semiconductor manufacturing process
A method for incorporating magnetic materials in a semiconductor manufacturing process includes manufacturing a semiconductor device including interlayers and dielectric layers, depositing a magnetic layer above a semiconductor device and forming metallized contacts...
07/03/2007
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