Bizarre Patents
A coffin, for allowing inclination for display of a deceased person in a natural position.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7391086 | Conductive contacts and methods for fabricating conductive contacts for elctrochemical planarization of a work piece Conductive contacts and methods for fabricating conductive contacts for electrochemical mechanical planarization are provided. A conductive contact in accordance with an exemplary embodiment of the invention includes, but is not limited to, a first conductive surfac... | 06/24/2008 |
| 7391089 | Semiconductor device and method of manufacturing the same A semiconductor device which includes a field effect transistor having a gate electrode on the upper side of a semiconductor substrate, with a gate insulation film therebetween, wherein at least the gate insulation film side of the gate electrode includes a film con... | 06/24/2008 |
| 7361596 | Semiconductor processing methods The invention includes methods of forming titanium-containing materials, such as, for example, titanium silicide. The invention can use alternating cycles of titanium halide precursor and one or more reductants to form the titanium-containing material. For instance,... | 04/22/2008 |
| 7355255 | Nickel silicide including indium and a method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nicke... | 04/08/2008 |
| 7344985 | Nickel alloy silicide including indium and a method of manufacture therefor The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate ... | 03/18/2008 |
| 7314830 | Method of fabricating semiconductor integrated circuit device with 99.99 wt% cobalt A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETS by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target ha... | 01/01/2008 |
| 7307017 | Semiconductor devices and fabrication methods thereof Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer... | 12/11/2007 |
| 7282443 | Methods of forming metal silicide The invention includes methods of forming metal silicide having bulk resistance of less than 30 micro-ohms-centimeter. The metal of the metal silicide can be selected from Groups 3, 4, 8, 9 and 10 of the periodic table, with an exemplary metal being titanium. An exe... | 10/16/2007 |
| 7274055 | Method for improving transistor performance through reducing the salicide interface resistance An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the sour... | 09/25/2007 |
| 7229920 | Method of fabricating metal silicide layer A method of fabricating a metal silicide layer over a substrate is provided. First, a hard mask layer is formed over a gate formed on a substrate and a portion of the substrate is exposed. Thereafter, a first metal silicide layer, which is a cobalt silicide or a tit... | 06/12/2007 |
| 7223689 | Methods for forming a metal contact in a semiconductor device in which an ohmic layer is formed while forming a barrier metal layer A metal contact in a semiconductor device is formed by forming an insulating layer having a contact hole therein on a silicon substrate. A cobalt layer is formed on a bottom and inner walls of the contact hole. A cobalt silicide layer is formed at the bottom of the ... | 05/29/2007 |
| 7214620 | Methods of forming silicide films with metal films in semiconductor devices and contacts including the same A method of forming a silicide film can include forming a first metal film on a silicon substrate and forming a second metal film on the first metal film at a temperature sufficient to react a first portion of the first metal film in contact with the silicon substra... | 05/08/2007 |
| 7208409 | Integrated circuit metal silicide method Fluorine containing regions (70) are formed in the source and drain regions (60) of the MOS transistor. A metal layer (90) is formed over the fluorine containing regions (70) and the source and drain regions (60). The metal layer i... | 04/24/2007 |
| 7205234 | Method of forming metal silicide A method of optimizing the formation of nickel silicide on regions of a MOSFET structure, has been developed. The method features formation of nickel silicide using an anneal procedure performed at a temperature below which nickel silicide instability and agglomerat... | 04/17/2007 |
| 7129169 | Method for controlling voiding and bridging in silicide formation A method for forming a metal silicide contact for a semiconductor device includes forming a refractory metal layer over a substrate, including active and non-active area of said substrate, and forming a cap layer over the refractory metal layer. A counter tensile la... | 10/31/2006 |
| 6699769 | Method for fabricating capacitor using electrochemical deposition and wet etching Provided is a method for fabricating a capacitor using an electrochemical deposition method and Ce(NH4)2 (NO3)6 solution. The method includes the steps of: a) forming a contact hole in an insulation layer on a s... | 03/02/2004 |
| 6688584 | Compound structure for reduced contact resistance Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first r... | 02/10/2004 |
| 6686619 | Dynamic random access memory with improved contact arrangements A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally e... | 02/03/2004 |
| 6677650 | Silicon plugs and local interconnect for embedded memory and system-on-chip (SOC) applications A process for fabricating system-on-chip devices which contain embedded DRAM along with other components such as SRAM or logic circuits is disclosed. Local interconnects, via salicides and tungsten are formed subsequent to polysilicon plugs required for t... | 01/13/2004 |
| 6677234 | Method of selectively forming silicide In a crystalline silicon body a shallow trench insulation is made by etching a groove and filling it with silicon oxide. Ridges of polysilicon are made on the surface of the silicon body by applying a layer of polysilicon and patterning it with a known te... | 01/13/2004 |
| 6673704 | Semiconductor device and method of manufacturing the same A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, fillin... | 01/06/2004 |
| 6667228 | Method for fabricating cell plugs of semiconductor device A method for fabricating cell plugs of a semiconductor device is disclosed, which increases the operation speed of the semiconductor device by reducing the cell plug resistance of the device. The method includes the steps of forming a first insulating int... | 12/23/2003 |
| 6660620 | Method of forming noble metal pattern A process for high resolution patterning of noble metals, such as platinum, for forming various semiconductor devices, such as capacitors or wiring patterns, is disclosed. A layer of noble metal, which will form an upper electrode of a capacitor, is forme... | 12/09/2003 |
| 6645801 | Salicided gate for virtual ground arrays The present invention provides a process for saliciding the word lines in a virtual ground array flash memory device without saliciding the substrate between word lines. According to the invention, in a process for manufacturing virtual ground array flash... | 11/11/2003 |
| 6642606 | Method for producing siliconized polysilicon contacts in integrated semiconductor structures In the manufacture of integrated semiconductor structures, the problem frequently occurs that the resistance of polysilicon structures employed as interconnects must be selectively lowered. In order to reduce the resistance of a polysilicon structure, the... | 11/04/2003 |
| 6635523 | Semiconductor device and method of manufacturing the same The method of forming a capacitor of a semiconductor device comprises the steps of forming a semiconductor film connected to a semiconductor substrate, forming a capacitor lower electrode made of a tungsten film selectively on a surface of the semiconduct... | 10/21/2003 |
| 6614116 | Buried digit line stack and process for making same A process of making a buried digit line stack is disclosed. The process includes forming a silicon-lean metal silicide first film over a polysilicon plug, followed by a silicide compound barrier second film. The silicide compound barrier second film is co... | 09/02/2003 |
| 6593609 | Semiconductor memory device The present invention provides a semiconductor memory device in which a first insulation film and a second insulation film are laminated on a source and a drain of an access transistor to form a laminated insulation film, wherein the first insulation film... | 07/15/2003 |
| 6594172 | Method of selectively forming local interconnects using design rules The invention includes a method of fabricating a circuit in a manner to place certain structures within a predefined distance of one another. Electrical connections are formed between certain structures of silicon, by annealing a conductive material to ca... | 07/15/2003 |
| 6576546 | Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications An embodiment of the instant invention is a method of forming a conductive barrier layer on a dielectric layer, the method comprising the steps of: providing the dielectric layer (112 of FIG. 7d) having a top surface, a bottom surface, and an opening exte... | 06/10/2003 |
| 6535413 | Method of selectively forming local interconnects using design rules The invention includes a method of fabricating a circuit in a manner to place certain structures within a predefined distance of one another. Electrical connections are formed between certain structures of silicon, by annealing a conductive material to ca... | 03/18/2003 |
| 6489208 | Method of forming a laminated structure to enhance metal silicide adhesion on polycrystalline silicon A method of forming a gate electrode of a multi-layer structure includes a step of supplying a processing gas for poly-crystal film formation and impurities of a P-type into a film formation device, to form a poly-crystal silicon layer doped with P-type i... | 12/03/2002 |
| 6486060 | Low resistance semiconductor process and structures A process for forming a semiconductor device comprises the steps of providing a semiconductor substrate assembly comprising a semiconductor wafer having an active area formed therein, a plurality of transistor gates each having a TEOS cap thereon and a pa... | 11/26/2002 |
| 6475911 | Method of forming noble metal pattern A process for high resolution patterning of noble metals, such as platinum, for forming various semiconductor devices, such as capacitors or wiring patterns, is disclosed. A layer of noble metal, which will form an upper electrode of a capacitor, is forme... | 11/05/2002 |
| 6468905 | Methods of restricting silicon migration Methods of forming refractory metal silicide components are described. In accordance with one implementation, a refractory metal layer is formed over a substrate. A silicon-containing structure is formed over the refractory metal layer and a silicon diffu... | 10/22/2002 |
| 6461959 | Method of fabrication of a contact plug in an embedded memory A semiconductor wafer is provided having both a memory array region and a periphery circuit region. A plurality of gate and LDD are formed in the memory array region. Next, a silicon nitride layer and a second dielectric layer are formed on the surface of... | 10/08/2002 |
| 6452277 | Semiconductor device and manufacturing method thereof A silicon oxide film is formed to cover a polysilicon plug. A bowing shaped hole is formed. A barrier metal and a metal film are formed, which are successively subjected to prescribed anisotropic etching. Here, because of the RIE-lag effect, the etch rate... | 09/17/2002 |
| 6440843 | Semiconductor device and method for manufacturing the same A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, fillin... | 08/27/2002 |
| 6403475 | Fabrication method for semiconductor integrated device Annealing technology is capable of heating a wafer on which a copper film is formed at a desired temperature within a short period of time. A light-shielding plate 106 of SiC (silicon carbide) exhibiting a flat emissivity irrespective of the wavelengths a... | 06/11/2002 |
| 6404021 | Laminated structure and a method of forming the same A method of forming a gate electrode of a multi-layer structure includes a step of supplying a processing gas for poly-crystal film formation and impurities of a P-type into a film formation device, to form a poly-crystal silicon layer doped with P-type i... | 06/11/2002 |
