...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 7432173 | Methods of fabricating silicon-on-insulator substrates having a laser-formed single crystalline film In some methods of fabricating a silicon-on-insulator substrate, a semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A first insulating film is formed on the defined region of the semiconductor... | 10/07/2008 |
| 7432149 | CMOS on SOI substrates with hybrid crystal orientations Methods and structures for CMOS devices with hybrid crystal orientations using double SOI substrates is provided. In accordance with preferred embodiments, a manufacturing sequence includes the steps of forming an SOI silicon epitaxy layer after the step of forming ... | 10/07/2008 |
| 7405140 | Low temperature formation of patterned epitaxial Si containing films A method for selectively forming an epitaxial Si containing film on a semiconductor structure at low temperature. The method includes providing the structure in a process chamber, the structure containing a Si substrate having an epitaxial Si surface area and a patt... | 07/29/2008 |
| 7399686 | Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate A semiconductor processing method includes providing a substrate, forming a plurality of semiconductor layers in the substrate, each of the semiconductor layers being distinct and selected from different groups of semiconductor element types, the semiconductor layer... | 07/15/2008 |
| 7355248 | Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same A semiconductor device includes a first semiconductor layer that is formed on a first insulating layer; a second insulating layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the second insulating layer; a first gat... | 04/08/2008 |
| 7352034 | Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures Methods of forming a semiconductor structure having FinFET's and planar devices, such as MOSFET's, on a common substrate by a damascene approach. A semiconductor fin of the FinFET is formed on a substrate with damascene processing in which the fin growth may be inte... | 04/01/2008 |
| 7351633 | Method of fabricating semiconductor device using selective epitaxial growth A method of fabricating a semiconductor device using selective epitaxial growth (SEG) is disclosed. The method comprises; forming a seed window exposing a portion of a substrate through an interlayer insulating layer, growing a single crystal silicon SEG layer in th... | 04/01/2008 |
| 7344957 | SOI wafer with cooling channels and a method of manufacture thereof A method (100) of forming a silicon-on-insulator (SOI) wafer includes forming one or more channels in a top surface of a first wafer (104), and forming an insulator layer on a second wafer (106). The second wafer is treated (108) to gener... | 03/18/2008 |
| 7335541 | Method for fabricating thin film transistor using the mask for forming polysilicon including slit patterns deviated from each other A mask for crystallization of amorphous silicon to polysilicon is provided. The mask includes a plurality of slit patterns for defining regions to be illuminated. The plurality of slit patterns are formed along a longitudinal first direction and the mask moves along... | 02/26/2008 |
| 7265417 | Method of fabricating semiconductor side wall fin A double gated silicon-on-insulator (SOI) MOSFET is fabricated by forming epitaxially grown channels, followed by a damascene gate. The double gated MOSFET features narrow channels, which increases current drive per layout width and provides low out conductance.... | 09/04/2007 |
| 7186627 | Method for forming device isolation film of semiconductor device A method for forming device isolation film of semiconductor device is provided, the method including forming a pad oxide film, a pad nitride film, and an oxide film for device isolation on a semiconductor substrate, etching a predetermined region of the oxide film f... | 03/06/2007 |
| 7172930 | Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer A cost efficient and manufacturable method of fabricating strained semiconductor-on-insulator (SSOI) substrates is provided that avoids wafer bonding. The method includes growing various epitaxial semiconductor layers on a substrate, wherein at least one of the semi... | 02/06/2007 |
| 7078299 | Formation of finFET using a sidewall epitaxial layer A method of forming a finFET transistor using a sidewall epitaxial layer includes forming a silicon germanium (SiGe) layer above an oxide layer above a substrate, forming a cap layer above the SiGe layer, removing portions of the SiGe layer and the cap layer to form... | 07/18/2006 |
| 6670257 | Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting... | 12/30/2003 |
| 6635543 | SOI hybrid structure with selective epitaxial growth of silicon A method and structure for selectively growing epitaxial silicon in a trench formed within a silicon-on-insulator (SOI) structure. The SOI structure includes a buried oxide layer (BOX) on a bulk silicon substrate, and a silicon layer on the BOX. A pad lay... | 10/21/2003 |
| 6617226 | Semiconductor device and method for manufacturing the same In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating ... | 09/09/2003 |
| 6583451 | Process for fabricating a network of nanometric lines made of single-crystal silicon and device obtained The process for fabricating a network of nanometric lines made of single-crystal silicon on an isolating substrate includes the production of a substrate comprising a silicon body having a lateral isolation defining a central part in the body. A recess is... | 06/24/2003 |
| 6555891 | SOI hybrid structure with selective epitaxial growth of silicon A method and structure for selectively growing epitaxial silicon in a trench formed within a silicon-on-insulator (SOI) structure. The SOI structure includes a buried oxide layer (BOX) on a bulk silicon substrate, and a silicon layer on the BOX. A pad lay... | 04/29/2003 |
| 6506663 | Method for producing an SOI wafer A method for providing an SOI wafer that includes, on a wafer of monocrystalline semiconductor material, forming a hard mask of an oxidation-resistant material, defining first protective regions covering first portions of the wafer; excavating the second ... | 01/14/2003 |
| 6479354 | Semiconductor device with selective epitaxial growth layer and isolation method in a semiconductor device A method of forming a semiconductor device with a SEG layer and isolating elements formed in the device includes forming an insulating layer for isolating elements on a silicon substrate. An open area is formed in the insulating layer to expose the surfac... | 11/12/2002 |
| 6409829 | Manufacture of dielectrically isolated integrated circuits Integrated circuit devices are formed in a substrate wafer using selective epitaxial growth (SEG). Non-uniform epitaxial wafer thickness results when the distribution of SEG regions across the surface of the wafer is non-uniform, resulting in loading effe... | 06/25/2002 |
| 6403427 | Field effect transistor having dielectrically isolated sources and drains and method for making same A field-effect transistor and a method for its fabrication are described. The transistor includes a monocrystalline channel region extending from a monocrystalline body region of a semiconductor substrate. First and second source/drain regions laterally a... | 06/11/2002 |
| 6399429 | Method of forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device Single-crystal silicon is deposited on an insulating substrate (1) with a crystalline sapphire layer (50) formed thereon as a seed, to form a silicon epitaxial layer (7). P-type impurity ions are implanted into a single-crystal silicon layer, and then N-t... | 06/04/2002 |
| 6399961 | Field effect transistor having dielectrically isolated sources and drains and method for making same A field-effect transistor and a method for its fabrication are described. The transistor includes a monocrystalline channel region extending from a monocrystalline body region of a semiconductor substrate. First and second source/drain regions laterally a... | 06/04/2002 |
| 6380074 | Deposition of various base layers for selective layer growth in semiconductor production A method for the shrink-hole-free filling of trenches in semiconductor circuits which utilizes selective growth of a layer to be applied is described. In the method, a layer of a selective growing material is applied simultaneously to a growth-promoting l... | 04/30/2002 |
| 6350657 | Inexpensive method of manufacturing an SOI wafer A method of manufacturing an SOI (silicon on insulator) wafer includes the step of selective anisotropic etching to form, in the substrate, trenches which extend to a predetermined depth from a major surface of the substrate and between which pillar porti... | 02/26/2002 |
| 6300209 | Method of fabricating triple well of semiconductor device using SEG There is disclosed a triple well of a semiconductor device using SEG and method of forming the same. The method of forming a triple well of a semiconductor device using SEG according to the present invention is characterized in that it comprises the steps... | 10/09/2001 |
| 6225666 | Low stress active area silicon island structure with a non-rectangular cross-section profile and method for its formation A low stress active area silicon island structure with a reduced susceptibility to gate polysilicon layer "wraparound" and stringer formation during subsequent semiconductor manufacturing. The structure includes a semiconductor substrate (e.g. a silicon w... | 05/01/2001 |
| 6198114 | Field effect transistor having dielectrically isolated sources and drains and method for making same A field-effect transistor and a method for its fabrication are described. The transistor includes a monocrystalline channel region extending from a monocrystalline body region of a semiconductor substrate. First and second source/drain regions laterally a... | 03/06/2001 |
| 6143629 | Process for producing semiconductor substrate In a process for producing a semiconductor substrate, comprising sealing surface pores of a porous silicon layer and thereafter forming a single-crystal layer on the porous silicon layer by epitaxial growth, intermediate heat treatment is carried out afte... | 11/07/2000 |
| 6037198 | Method of fabricating SOI wafer The present invention is to fabricate SOI wafer whose the silicon layer is very uniform and the impurity concentration is low. The insulating layer, that is, a composite layer of SiO2 and silicon, is grown on oxide substrate by means of a molecular beam e... | 03/14/2000 |