Class 257/E21.547 - Dielectric material being obtained by full chemical transformation of nondielectric materials, such as polycrystalline silicon, metals (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.546. This subclass
No. of patents: 73
Last issue date: 10/14/2008

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Number	Title	Issue Date
7435684	Resolving of fluorine loading effect in the vacuum chamber This invention relates to electronic device fabrication processes for making devices such as semiconductor wafers and resolves the fluorine loading effect in the reaction chamber of a HDP CVD apparatus used for forming dielectric layers in high aspect ratio, narrow ...	10/14/2008
7425761	Method of manufacturing a dielectric film in a capacitor A method of manufacturing a dielectric layer for a capacitor including sequentially supplying and purging a first and a second precursor material for a first and a second predetermined amount of time, respectively, in an initial cycle, sequentially supplying and pur...	09/16/2008
7371655	Method of fabricating low-power CMOS device A low-power CMOS device can be fabricated by forming a shallow trench on a silicon substrate using a gate mask and negative photoresist. This enables an extremely low profile for a junction after completion of lightly doped drain and source/drain implantations. The ...	05/13/2008
7339252	Semiconductor having thick dielectric regions A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The method also includes providing in the semiconductor substrate one or more trenches, first mesas and second...	03/04/2008
7307343	Low dielectric materials and methods for making same Low dielectric materials and films comprising same have been identified for improved performance when used as interlevel dielectrics in integrated circuits as well as methods for making same. These materials are characterized as having a dielectric constant (κ) a d...	12/11/2007
7238586	Seamless trench fill method utilizing sub-atmospheric pressure chemical vapor deposition technique A seamless trench fill method utilizing ozone-assisted sub-atmospheric pressure chemical vapor deposition (SACVD) technique is provided. After the deposition of a SACVD silicon oxide film, the substrate is subjected to a steam anneal that is performed under H2	07/03/2007
7238588	Silicon buffered shallow trench isolation A method of manufacturing an integrated circuit (IC) utilizes a shallow trench isolation (STI) technique. The shallow trench isolation technique is used in strained silicon (SMOS) process. The liner for the trench is formed from a semiconductor or metal layer which ...	07/03/2007
7211525	Hydrogen treatment enhanced gap fill Methods of filling gaps on semiconductor substrates with dielectric film are described. The methods reduce or eliminate sidewall deposition and top-hat formation. The methods also reduce or eliminate the need for etch steps during dielectric film deposition. The met...	05/01/2007
7199020	Nitridation of STI liner oxide for modulating inverse width effects in semiconductor devices A method (1300) of forming a semiconductor device comprising an isolation structure is disclosed, and includes forming a trench region within a semiconductor body (1308). Then, surfaces of the trench region are nitrided (1310) via a nitridation ...	04/03/2007
7144803	Methods of forming boron carbo-nitride layers for integrated circuit devices The present invention includes methods for forming a boron carbo-nitride layer. Additional embodiments include thermal chemical vapor deposition methods for forming a boron carbo-nitride layer. Also integrated circuit devices with a boron carbo-nitride layer are dis...	12/05/2006
7023069	Method for forming thick dielectric regions using etched trenches A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The method also includes providing in the semiconductor substrate one or more trenches, first mesas and second...	04/04/2006
6664182	Method of improving the interlayer adhesion property of low-k layers in a dual damascene process The present invention provides for an improvement of the interlayer adhesion property of the low-K layers in a dual damascene process. The method includes a shallow ion implantation process to bombard a bottom low-k layer for forming a densified layer on ...	12/16/2003
6664170	Method for forming device isolation layer of a semiconductor device The present disclosure relates to a method for forming a device isolation layer of a semiconductor device by a shallow trench isolation (STI). In the disclosed methods, after a nitride layer is removed from the silicon substrate, an amorphous silicon laye...	12/16/2003
6602759	Shallow trench isolation for thin silicon/silicon-on-insulator substrates by utilizing polysilicon A method for forming an isolation trench in a silicon or silicon-on-insulator substrate is described in which a trench is formed in the semiconductor structure (containing a multiple layer structure of Si, SiO2, and SiN layers) and an undoped p...	08/05/2003
6475875	Shallow trench isolation elevation uniformity via insertion of a polysilicon etch layer A process for forming insulator filled, shallow trench isolation (STI), regions in a semiconductor substrate, featuring a disposable polysilicon stop layer used to allow uniform insulator fill to be obtained, independent of shallow trench width, has been ...	11/05/2002
6214696	Method of fabricating deep-shallow trench isolation The method includes forming a pad oxide, a polysilicon layer over a substrate. Next, an oxide layer is formed over the polysilicon layer. An opening is formed in the oxide layer, the polysilicon layer, and the pad layer. A trench is formed by etching the ...	04/10/2001
6184108	Method of making trench isolation structures with oxidized silicon regions A trench isolation structure in a semiconductor substrate includes a trench opening in the surface of the substrate and a seamless oxide layer filling the trench. The seamless oxide layer is formed by forming a first oxide layer in the trench, adding a si...	02/06/2001
6175147	Device isolation for semiconductor devices Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly comprises: a first trench in a semiconductive substrate; a second trench extending the overall tren...	01/16/2001
6137152	Planarized deep-shallow trench isolation for CMOS/bipolar devices The trench isolation structure in the present invention is as follows. A lower-half trench is in the substrate. An upper-half trench in the substrate is located above the lower-half trench and the upper-half trench has a larger width than the lower-half t...	10/24/2000
6136664	Filling of high aspect ratio trench isolation A method of forming a trench isolation on a semiconductor substrate comprising the steps of forming a trench in the substrate, partially filling the trench with a first layer of polysilicon, oxidizing the first layer of polysilicon, partially filling the ...	10/24/2000
6114218	Texturized polycrystalline silicon to aid field oxide formation A method of forming field oxide during the manufacture of a semiconductor device comprises the steps of providing a semiconductor wafer having a plurality of recesses or trenches therein. A layer of texturized polycrystalline silicon is formed within the ...	09/05/2000
6103595	Assisted local oxidation of silicon A method for forming a semiconductor device comprises the steps of providing a semiconductor substrate having first and second surfaces, the second surface having an inferior plane with respect to the first surface. An oxidizing-resistant layer such as ni...	08/15/2000
6064104	Trench isolation structures with oxidized silicon regions and method for making the same A trench isolation structure in a semiconductor substrate includes a trench opening in the surface of the substrate and a seamless oxide layer filling the trench. The seamless oxide layer is formed by forming a first oxide layer in the trench, adding a si...	05/16/2000
6063691	Shallow trench isolation (STI) fabrication method for semiconductor device An STI fabrication method for a semiconductor device is disclosed, which includes the steps of forming a trench on a semiconductor substrate, forming a conductive film on the trench, ion-implanting a germanium into the conductive film, and oxidizing the c...	05/16/2000
6020230	Process to fabricate planarized deep-shallow trench isolation having upper and lower portions with oxidized semiconductor trench fill in the upper portion and semiconductor trench fill in the lower portion The method in the present invention is proposed for forming trench isolation in a semiconductor substrate. The method includes the steps as follows. At first, a pad layer is formed over the substrate. A first stacked layer is then formed over the pad laye...	02/01/2000
5926717	Method of making an integrated circuit with oxidizable trench liner A method for isolating a first active region from a second active region, both of which are configured within a semiconductor substrate. The method comprises forming a trench in the semiconductor substrate between said first active region and said second ...	07/20/1999
5915191	Method for fabricating a semiconductor device with improved device integration and field-region insulation A method for the fabrication of a semiconductor device is characterized by a series of steps comprising successively forming a trench in a field region of monosilicon substrate and forming an oxidation-preventive layer and a silicon layer in the trench, a...	06/22/1999
5888881	Method of trench isolation during the formation of a semiconductor device A process for fabricating a recessed field oxide area comprises providing a substrate having isolation stacks and first and second recesses having openings therein, the first recesses being wider than the second recesses. The recesses can have a depth in ...	03/30/1999
5837596	Field oxide formation by oxidation of polysilicon layer A process for forming field oxide on a semiconductor substrate having reduced field oxide thinning comprises forming of an oxide layer over a semiconductor substrate, and forming a protective layer over the oxide layer. A mask is formed over the protectiv...	11/17/1998
5753962	Texturized polycrystalline silicon to aid field oxide formation A method of forming field oxide during the manufacture of a semiconductor device comprises the steps of providing a semiconductor wafer having a plurality of recesses or trenches therein. A layer of texturized polycrystalline silicon is formed within the ...	05/19/1998
5683933	Method of fabricating a semiconductor device To minimize error in size and form a thick oxide layer as field insulating means in a narrow isolation region, a method of fabricating a semiconductor device is carried out as followings. A polysilicon layer 3 is formed on a silicon substrate 1. A silicon nitr...	11/04/1997
5681776	Planar selective field oxide isolation process using SEG/ELO An isolation method for separating active regions on a semiconductor substrate is disclosed. Portions of the substrate not corresponding to the active regions are etched to a predetermined depth. After some oxide, nitride and dielectric deposition steps, ...	10/28/1997
5661073	Method for forming field oxide having uniform thickness A method for forming a semiconductor device comprises the steps of providing a semiconductor substrate having first and second surfaces, the second surface having an inferior plane with respect to the first surface. An oxidizing-resistant layer such as ni...	08/26/1997
5599730	Poly-buffered LOCOS A method of field oxide formation which creates field oxides of comparatively uniform height between differently-spaced oxidation masks is disclosed. A patterned oxidation mask, typically silicon nitride, (possibly with underlying polysilicon) is formed. ...	02/04/1997
5512509	Method for forming an isolation layer in a semiconductor device A present method for forming an isolation layer in a semiconductor can minimize the size of a "bird's beak" and reduce the stress on a silicon substrate by forming a trench in the filed region, a nitride spacer on the inner wall of the trench, and a polys...	04/30/1996
5472904	Thermal trench isolation A process useful for isolating active areas of semiconductor devices in which an isolation trench is created in a substrate, the isolation trench being lined with an oxidation barrier and filled with a thick film. An oxidation step is performed in which t...	12/05/1995
5471091	Techniques for via formation and filling Via filling is enhanced by the techniques of 1) providing pillars immediately underneath semiconductor features, such as metal layer contacts (inter-connection points), and 2) polishing off excess via-filling material so that the via-filling plug is flush...	11/28/1995
5455194	Encapsulation method for localized oxidation of silicon with trench isolation A method for the fabrication of a trench isolation region (44) includes the deposition of first, second, and third oxidizable layers (28, 34, 42). The first oxidizable layer (28) is deposited to overlie the surface of a trench (12) formed in a semiconduct...	10/03/1995
5441094	Trench planarization techniques Various techniques for quantifying polishing performance are disclosed, and provide insight on the progression from a planarization regime to a smoothing regime to a blanket polish back regime, as well as providing a single, definable parameter (Quality C...	08/15/1995
5438016	Method of semiconductor device isolation employing polysilicon layer for field oxide formation A process for forming field oxide on a semiconductor substrate having reduced field oxide thinning comprises forming an oxide layer over a semiconductor substrate, and forming a protective layer over the oxide layer. A mask is formed over the protective l...	08/01/1995

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Class 257/E21.547 - Dielectric material being obtained by full chemical transformation of nondielectric materials, such as polycrystalline silicon, metals (EPO)